/* * Copyright (C) 2015 Renesas Electronics Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ #define __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ #include /* r8a7795 CPG Core Clocks */ #define R8A7795_CLK_Z 0 #define R8A7795_CLK_Z2 1 #define R8A7795_CLK_ZR 2 #define R8A7795_CLK_ZG 3 #define R8A7795_CLK_ZTR 4 #define R8A7795_CLK_ZTRD2 5 #define R8A7795_CLK_ZT 6 #define R8A7795_CLK_ZX 7 #define R8A7795_CLK_S0D1 8 #define R8A7795_CLK_S0D4 9 #define R8A7795_CLK_S1D1 10 #define R8A7795_CLK_S1D2 11 #define R8A7795_CLK_S1D4 12 #define R8A7795_CLK_S2D1 13 #define R8A7795_CLK_S2D2 14 #define R8A7795_CLK_S2D4 15 #define R8A7795_CLK_S3D1 16 #define R8A7795_CLK_S3D2 17 #define R8A7795_CLK_S3D4 18 #define R8A7795_CLK_LB 19 #define R8A7795_CLK_CL 20 #define R8A7795_CLK_ZB3 21 #define R8A7795_CLK_ZB3D2 22 #define R8A7795_CLK_CR 23 #define R8A7795_CLK_CRD2 24 #define R8A7795_CLK_SD0H 25 #define R8A7795_CLK_SD0 26 #define R8A7795_CLK_SD1H 27 #define R8A7795_CLK_SD1 28 #define R8A7795_CLK_SD2H 29 #define R8A7795_CLK_SD2 30 #define R8A7795_CLK_SD3H 31 #define R8A7795_CLK_SD3 32 #define R8A7795_CLK_SSP2 33 #define R8A7795_CLK_SSP1 34 #define R8A7795_CLK_SSPRS 35 #define R8A7795_CLK_RPC 36 #define R8A7795_CLK_RPCD2 37 #define R8A7795_CLK_MSO 38 #define R8A7795_CLK_CANFD 39 #define R8A7795_CLK_HDMI 40 #define R8A7795_CLK_CSI0 41 #define R8A7795_CLK_CSIREF 42 #define R8A7795_CLK_CP 43 #define R8A7795_CLK_CPEX 44 #define R8A7795_CLK_R 45 #define R8A7795_CLK_OSC 46 #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */ 9095d'>commitdiff
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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /net/tipc/Makefile
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/tipc/Makefile')