/* * Copyright (C) 2016 Renesas Electronics Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ #define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ #include /* r8a7796 CPG Core Clocks */ #define R8A7796_CLK_Z 0 #define R8A7796_CLK_Z2 1 #define R8A7796_CLK_ZR 2 #define R8A7796_CLK_ZG 3 #define R8A7796_CLK_ZTR 4 #define R8A7796_CLK_ZTRD2 5 #define R8A7796_CLK_ZT 6 #define R8A7796_CLK_ZX 7 #define R8A7796_CLK_S0D1 8 #define R8A7796_CLK_S0D2 9 #define R8A7796_CLK_S0D3 10 #define R8A7796_CLK_S0D4 11 #define R8A7796_CLK_S0D6 12 #define R8A7796_CLK_S0D8 13 #define R8A7796_CLK_S0D12 14 #define R8A7796_CLK_S1D1 15 #define R8A7796_CLK_S1D2 16 #define R8A7796_CLK_S1D4 17 #define R8A7796_CLK_S2D1 18 #define R8A7796_CLK_S2D2 19 #define R8A7796_CLK_S2D4 20 #define R8A7796_CLK_S3D1 21 #define R8A7796_CLK_S3D2 22 #define R8A7796_CLK_S3D4 23 #define R8A7796_CLK_LB 24 #define R8A7796_CLK_CL 25 #define R8A7796_CLK_ZB3 26 #define R8A7796_CLK_ZB3D2 27 #define R8A7796_CLK_ZB3D4 28 #define R8A7796_CLK_CR 29 #define R8A7796_CLK_CRD2 30 #define R8A7796_CLK_SD0H 31 #define R8A7796_CLK_SD0 32 #define R8A7796_CLK_SD1H 33 #define R8A7796_CLK_SD1 34 #define R8A7796_CLK_SD2H 35 #define R8A7796_CLK_SD2 36 #define R8A7796_CLK_SD3H 37 #define R8A7796_CLK_SD3 38 #define R8A7796_CLK_SSP2 39 #define R8A7796_CLK_SSP1 40 #define R8A7796_CLK_SSPRS 41 #define R8A7796_CLK_RPC 42 #define R8A7796_CLK_RPCD2 43 #define R8A7796_CLK_MSO 44 #define R8A7796_CLK_CANFD 45 #define R8A7796_CLK_HDMI 46 #define R8A7796_CLK_CSI0 47 #define R8A7796_CLK_CSIREF 48 #define R8A7796_CLK_CP 49 #define R8A7796_CLK_CPEX 50 #define R8A7796_CLK_R 51 #define R8A7796_CLK_OSC 52 #endif /* __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ */ move&id=08d85f3ea99f1eeafc4e8507936190e86a16ee8c'>commitdiff
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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-17 16:00:48 +0000
committerThomas Gleixner <tglx@linutronix.de>2017-01-30 15:18:56 +0100
commit08d85f3ea99f1eeafc4e8507936190e86a16ee8c (patch)
tree410bb1acd0cd7dcfaad37ae7b63ff243b7fa4bee /net/ipv4/xfrm4_policy.c
parent566cf877a1fcb6d6dc0126b076aad062054c2637 (diff)
irqdomain: Avoid activating interrupts more than once
Since commit f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early"), we can end-up activating a PCI/MSI twice (once at allocation time, and once at startup time). This is normally of no consequences, except that there is some HW out there that may misbehave if activate is used more than once (the GICv3 ITS, for example, uses the activate callback to issue the MAPVI command, and the architecture spec says that "If there is an existing mapping for the EventID-DeviceID combination, behavior is UNPREDICTABLE"). While this could be worked around in each individual driver, it may make more sense to tackle the issue at the core level. In order to avoid getting in that situation, let's have a per-interrupt flag to remember if we have already activated that interrupt or not. Fixes: f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early") Reported-and-tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1484668848-24361-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'net/ipv4/xfrm4_policy.c')