/* * Copyright (C) 2015 Renesas Electronics Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ #define __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ #define CPG_CORE 0 /* Core Clock */ #define CPG_MOD 1 /* Module Clock */ #endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */ xt.git Git repository'/>
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authorDavid Jander <david@protonic.nl>2014-10-10 17:30:10 +0200
committerMarc Kleine-Budde <mkl@pengutronix.de>2017-02-06 15:13:23 +0100
commitd254586c34538c0014280806c5d4795697cf21e5 (patch)
treeecce05b11eb440dc8bfc211de75304cd977ebbf9
parentbd092ad1463ca0990581fa992e12a9b0ed295d25 (diff)
can: rx-offload: Add support for HW fifo based irq offloading
Some CAN controllers have a usable FIFO already but can still benefit from off-loading the CAN controller FIFO. The CAN frames of the FIFO are read and put into a skb queue during interrupt and then transmitted in a NAPI context. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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