/*
* This header provides constants clk index STMicroelectronics
* STiH418 SoC.
*/
#ifndef _DT_BINDINGS_CLK_STIH418
#define _DT_BINDINGS_CLK_STIH418
#include "stih410-clks.h"
/* STiH418 introduces new clock outputs compared to STiH410 */
/* CLOCKGEN C0 */
#define CLK_PROC_BDISP_0 14
#define CLK_PROC_BDISP_1 15
#define CLK_TX_ICN_1 23
#define CLK_ETH_PHYREF 27
#define CLK_PP_HEVC 35
#define CLK_CLUST_HEVC 36
#define CLK_HWPE_HEVC 37
#define CLK_FC_HEVC 38
#define CLK_PROC_MIXER 39
#define CLK_PROC_SC 40
#define CLK_AVSP_HEVC 41
/* CLOCKGEN D2 */
#undef CLK_PIX_PIP
#undef CLK_PIX_GDP1
#undef CLK_PIX_GDP2
#undef CLK_PIX_GDP3
#undef CLK_PIX_GDP4
#define CLK_TMDS_HDMI_DIV2 5
#define CLK_VP9 47
#endif
'/cgit.cgi/linux/net-next.git/'>net-next.git
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth")
the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with
the *enum* declaring the EESR bits (interrupt status) WRT bit naming and
formatting. I'd like to restore the consistency by using EESIPR as the bit
name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the
bits according to the available Renesas SH77{34|63} manuals; additionally,
reconstruct couple names using the EESR bit declaration above...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>