/*
* This header provides constants clk index STMicroelectronics
* STiH418 SoC.
*/
#ifndef _DT_BINDINGS_CLK_STIH418
#define _DT_BINDINGS_CLK_STIH418
#include "stih410-clks.h"
/* STiH418 introduces new clock outputs compared to STiH410 */
/* CLOCKGEN C0 */
#define CLK_PROC_BDISP_0 14
#define CLK_PROC_BDISP_1 15
#define CLK_TX_ICN_1 23
#define CLK_ETH_PHYREF 27
#define CLK_PP_HEVC 35
#define CLK_CLUST_HEVC 36
#define CLK_HWPE_HEVC 37
#define CLK_FC_HEVC 38
#define CLK_PROC_MIXER 39
#define CLK_PROC_SC 40
#define CLK_AVSP_HEVC 41
/* CLOCKGEN D2 */
#undef CLK_PIX_PIP
#undef CLK_PIX_GDP1
#undef CLK_PIX_GDP2
#undef CLK_PIX_GDP3
#undef CLK_PIX_GDP4
#define CLK_TMDS_HDMI_DIV2 5
#define CLK_VP9 47
#endif
next.git/'>net-next.git
mac80211: add back lost debugfs files
Somehow these files were never present or lost, but the code
is there and they seem somewhat useful, so add them back.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
max77620: add support to configure MPOKAdding support to configure regulator POK mapping bit
to control nRST_IO and GPIO1 POK function.
In tegra based platform which uses MAX20024 pmic, when
some of regulators are configured FPS_NONE(flexible power sequencer)
causes PMIC GPIO1 to go low which lead to various other rails turning off,
to avoid this MPOK bit of those regulators need to be set to 0
so that PMIC GPIO1 will not go low.
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>