/* * This header provides constants for binding nvidia,tegra186-gpio*. * * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below * provide names for this. * * The second cell contains standard flag values specified in gpio.h. */ #ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H #define _DT_BINDINGS_GPIO_TEGRA_GPIO_H #include /* GPIOs implemented by main GPIO controller */ #define TEGRA_MAIN_GPIO_PORT_A 0 #define TEGRA_MAIN_GPIO_PORT_B 1 #define TEGRA_MAIN_GPIO_PORT_C 2 #define TEGRA_MAIN_GPIO_PORT_D 3 #define TEGRA_MAIN_GPIO_PORT_E 4 #define TEGRA_MAIN_GPIO_PORT_F 5 #define TEGRA_MAIN_GPIO_PORT_G 6 #define TEGRA_MAIN_GPIO_PORT_H 7 #define TEGRA_MAIN_GPIO_PORT_I 8 #define TEGRA_MAIN_GPIO_PORT_J 9 #define TEGRA_MAIN_GPIO_PORT_K 10 #define TEGRA_MAIN_GPIO_PORT_L 11 #define TEGRA_MAIN_GPIO_PORT_M 12 #define TEGRA_MAIN_GPIO_PORT_N 13 #define TEGRA_MAIN_GPIO_PORT_O 14 #define TEGRA_MAIN_GPIO_PORT_P 15 #define TEGRA_MAIN_GPIO_PORT_Q 16 #define TEGRA_MAIN_GPIO_PORT_R 17 #define TEGRA_MAIN_GPIO_PORT_T 18 #define TEGRA_MAIN_GPIO_PORT_X 19 #define TEGRA_MAIN_GPIO_PORT_Y 20 #define TEGRA_MAIN_GPIO_PORT_BB 21 #define TEGRA_MAIN_GPIO_PORT_CC 22 #define TEGRA_MAIN_GPIO(port, offset) \ ((TEGRA_MAIN_GPIO_PORT_##port * 8) + offset) /* GPIOs implemented by AON GPIO controller */ #define TEGRA_AON_GPIO_PORT_S 0 #define TEGRA_AON_GPIO_PORT_U 1 #define TEGRA_AON_GPIO_PORT_V 2 #define TEGRA_AON_GPIO_PORT_W 3 #define TEGRA_AON_GPIO_PORT_Z 4 #define TEGRA_AON_GPIO_PORT_AA 5 #define TEGRA_AON_GPIO_PORT_EE 6 #define TEGRA_AON_GPIO_PORT_FF 7 #define TEGRA_AON_GPIO(port, offset) \ ((TEGRA_AON_GPIO_PORT_##port * 8) + offset) #endif 82ce8b'>refslogtreecommitdiff
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authorTony Lindgren <tony@atomide.com>2017-01-19 08:49:07 -0800
committerVinod Koul <vinod.koul@intel.com>2017-01-25 11:29:11 +0530
commitae4a3e028bb8b59e7cfeb0cc9ef03d885182ce8b (patch)
tree139fc7e29f97d6bb6c4dca2a97be2dc3f824bd51 /tools/perf/Documentation/perf-sched.txt
parent49def1853334396f948dcb4cedb9347abb318df5 (diff)
dmaengine: cppi41: Fix runtime PM timeouts with USB mass storage
Commit fdea2d09b997 ("dmaengine: cppi41: Add basic PM runtime support") added runtime PM support for cppi41, but had corner case issues. Some of the issues were fixed with commit 098de42ad670 ("dmaengine: cppi41: Fix unpaired pm runtime when only a USB hub is connected"). That fix however caused a new regression where we can get error -115 messages with USB on BeagleBone when connecting a USB mass storage device to a hub. This is because when connecting a USB mass storage device to a hub, the initial DMA transfers can take over 200ms to complete and cppi41 autosuspend delay times out. To fix the issue, we want to implement refcounting for chan_busy array that contains the active dma transfers. Increasing the autosuspend delay won't help as that the delay could be potentially seconds, and it's best to let the USB subsystem to deal with the timeouts on errors. The earlier attempt for runtime PM was buggy as the pm_runtime_get/put() calls could get unpaired easily as they did not follow the state of the chan_busy array as described in commit 098de42ad670 ("dmaengine: cppi41: Fix unpaired pm runtime when only a USB hub is connected". Let's fix the issue by adding pm_runtime_get() to where a new transfer is added to the chan_busy array, and calls to pm_runtime_put() where chan_busy array entry is cleared. This prevents any autosuspend timeouts from happening while dma transfers are active. Fixes: 098de42ad670 ("dmaengine: cppi41: Fix unpaired pm runtime when only a USB hub is connected") Fixes: fdea2d09b997 ("dmaengine: cppi41: Add basic PM runtime support") Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Bin Liu <b-liu@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Patrick Titiano <ptitiano@baylibre.com> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Bin Liu <b-liu@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/Documentation/perf-sched.txt')