/* * This header provides constants for binding nvidia,tegra186-gpio*. * * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below * provide names for this. * * The second cell contains standard flag values specified in gpio.h. */ #ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H #define _DT_BINDINGS_GPIO_TEGRA_GPIO_H #include /* GPIOs implemented by main GPIO controller */ #define TEGRA_MAIN_GPIO_PORT_A 0 #define TEGRA_MAIN_GPIO_PORT_B 1 #define TEGRA_MAIN_GPIO_PORT_C 2 #define TEGRA_MAIN_GPIO_PORT_D 3 #define TEGRA_MAIN_GPIO_PORT_E 4 #define TEGRA_MAIN_GPIO_PORT_F 5 #define TEGRA_MAIN_GPIO_PORT_G 6 #define TEGRA_MAIN_GPIO_PORT_H 7 #define TEGRA_MAIN_GPIO_PORT_I 8 #define TEGRA_MAIN_GPIO_PORT_J 9 #define TEGRA_MAIN_GPIO_PORT_K 10 #define TEGRA_MAIN_GPIO_PORT_L 11 #define TEGRA_MAIN_GPIO_PORT_M 12 #define TEGRA_MAIN_GPIO_PORT_N 13 #define TEGRA_MAIN_GPIO_PORT_O 14 #define TEGRA_MAIN_GPIO_PORT_P 15 #define TEGRA_MAIN_GPIO_PORT_Q 16 #define TEGRA_MAIN_GPIO_PORT_R 17 #define TEGRA_MAIN_GPIO_PORT_T 18 #define TEGRA_MAIN_GPIO_PORT_X 19 #define TEGRA_MAIN_GPIO_PORT_Y 20 #define TEGRA_MAIN_GPIO_PORT_BB 21 #define TEGRA_MAIN_GPIO_PORT_CC 22 #define TEGRA_MAIN_GPIO(port, offset) \ ((TEGRA_MAIN_GPIO_PORT_##port * 8) + offset) /* GPIOs implemented by AON GPIO controller */ #define TEGRA_AON_GPIO_PORT_S 0 #define TEGRA_AON_GPIO_PORT_U 1 #define TEGRA_AON_GPIO_PORT_V 2 #define TEGRA_AON_GPIO_PORT_W 3 #define TEGRA_AON_GPIO_PORT_Z 4 #define TEGRA_AON_GPIO_PORT_AA 5 #define TEGRA_AON_GPIO_PORT_EE 6 #define TEGRA_AON_GPIO_PORT_FF 7 #define TEGRA_AON_GPIO(port, offset) \ ((TEGRA_AON_GPIO_PORT_##port * 8) + offset) #endif .git/log/include/math-emu/op-4.h'>logtreecommitdiff
path: root/include/math-emu/op-4.h
diff options
context:
space:
mode:
authorThomas Gleixner <tglx@linutronix.de>2017-01-31 19:03:21 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-31 20:22:18 +0100
commitaaaec6fc755447a1d056765b11b24d8ff2b81366 (patch)
treea7f4167960ee1df86739905b6ccdeb95465bfe5f /include/math-emu/op-4.h
parent08d85f3ea99f1eeafc4e8507936190e86a16ee8c (diff)
x86/irq: Make irq activate operations symmetric
The recent commit which prevents double activation of interrupts unearthed interesting code in x86. The code (ab)uses irq_domain_activate_irq() to reconfigure an already activated interrupt. That trips over the prevention code now. Fix it by deactivating the interrupt before activating the new configuration. Fixes: 08d85f3ea99f1 "irqdomain: Avoid activating interrupts more than once" Reported-and-tested-by: Mike Galbraith <efault@gmx.de> Reported-and-tested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701311901580.3457@nanos
Diffstat (limited to 'include/math-emu/op-4.h')