/* * This header provides constants for the ARM GIC. */ #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H #include /* interrupt specifier cell 0 */ #define GIC_SPI 0 #define GIC_PPI 1 /* * Interrupt specifier cell 2. * The flags in irq.h are valid, plus those below. */ #define GIC_CPU_MASK_RAW(x) ((x) << 8) #define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) #endif repository'/>
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authorChristophe JAILLET <christophe.jaillet@wanadoo.fr>2017-01-31 00:47:30 -0800
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2017-01-31 00:51:06 -0800
commit05e0be7c900797e9164976a6014d534ce3035909 (patch)
tree6064ddf732b21c686c958cb9da73f6eae6de5a27 /net/ipv4/ip_tunnel_core.c
parent3f5c34c6d4688b3b7e1dbc7bbc68a2f03a0d6b0c (diff)
Input: synaptics-rmi4 - fix reversed conditions in enable/disable_irq_wake
These tests are reversed. A warning should be displayed if an error is returned, not on success. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Diffstat (limited to 'net/ipv4/ip_tunnel_core.c')