/* * This header provides constants for the PRCMU bindings. * */ #ifndef _DT_BINDINGS_MFD_PRCMU_H #define _DT_BINDINGS_MFD_PRCMU_H /* * Clock identifiers. */ #define ARMCLK 0 #define PRCMU_ACLK 1 #define PRCMU_SVAMMCSPCLK 2 #define PRCMU_SDMMCHCLK 2 /* DBx540 only. */ #define PRCMU_SIACLK 3 #define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */ #define PRCMU_SGACLK 4 #define PRCMU_UARTCLK 5 #define PRCMU_MSP02CLK 6 #define PRCMU_MSP1CLK 7 #define PRCMU_I2CCLK 8 #define PRCMU_SDMMCCLK 9 #define PRCMU_SLIMCLK 10 #define PRCMU_CAMCLK 10 /* DBx540 only. */ #define PRCMU_PER1CLK 11 #define PRCMU_PER2CLK 12 #define PRCMU_PER3CLK 13 #define PRCMU_PER5CLK 14 #define PRCMU_PER6CLK 15 #define PRCMU_PER7CLK 16 #define PRCMU_LCDCLK 17 #define PRCMU_BMLCLK 18 #define PRCMU_HSITXCLK 19 #define PRCMU_HSIRXCLK 20 #define PRCMU_HDMICLK 21 #define PRCMU_APEATCLK 22 #define PRCMU_APETRACECLK 23 #define PRCMU_MCDECLK 24 #define PRCMU_IPI2CCLK 25 #define PRCMU_DSIALTCLK 26 #define PRCMU_DMACLK 27 #define PRCMU_B2R2CLK 28 #define PRCMU_TVCLK 29 #define SPARE_UNIPROCLK 30 #define PRCMU_SSPCLK 31 #define PRCMU_RNGCLK 32 #define PRCMU_UICCCLK 33 #define PRCMU_G1CLK 34 /* DBx540 only. */ #define PRCMU_HVACLK 35 /* DBx540 only. */ #define PRCMU_SPARE1CLK 36 #define PRCMU_SPARE2CLK 37 #define PRCMU_NUM_REG_CLOCKS 38 #define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS #define PRCMU_SYSCLK 39 #define PRCMU_CDCLK 40 #define PRCMU_TIMCLK 41 #define PRCMU_PLLSOC0 42 #define PRCMU_PLLSOC1 43 #define PRCMU_ARMSS 44 #define PRCMU_PLLDDR 45 /* DSI Clocks */ #define PRCMU_PLLDSI 46 #define PRCMU_DSI0CLK 47 #define PRCMU_DSI1CLK 48 #define PRCMU_DSI0ESCCLK 49 #define PRCMU_DSI1ESCCLK 50 #define PRCMU_DSI2ESCCLK 51 /* LCD DSI PLL - Ux540 only */ #define PRCMU_PLLDSI_LCD 52 #define PRCMU_DSI0CLK_LCD 53 #define PRCMU_DSI1CLK_LCD 54 #define PRCMU_DSI0ESCCLK_LCD 55 #define PRCMU_DSI1ESCCLK_LCD 56 #define PRCMU_DSI2ESCCLK_LCD 57 #define PRCMU_NUM_CLKS 58 #endif d=08d85f3ea99f1eeafc4e8507936190e86a16ee8c'>diff
path: root/include/uapi/asm-generic/unistd.h
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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-17 16:00:48 +0000
committerThomas Gleixner <tglx@linutronix.de>2017-01-30 15:18:56 +0100
commit08d85f3ea99f1eeafc4e8507936190e86a16ee8c (patch)
tree410bb1acd0cd7dcfaad37ae7b63ff243b7fa4bee /include/uapi/asm-generic/unistd.h
parent566cf877a1fcb6d6dc0126b076aad062054c2637 (diff)
irqdomain: Avoid activating interrupts more than once
Since commit f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early"), we can end-up activating a PCI/MSI twice (once at allocation time, and once at startup time). This is normally of no consequences, except that there is some HW out there that may misbehave if activate is used more than once (the GICv3 ITS, for example, uses the activate callback to issue the MAPVI command, and the architecture spec says that "If there is an existing mapping for the EventID-DeviceID combination, behavior is UNPREDICTABLE"). While this could be worked around in each individual driver, it may make more sense to tackle the issue at the core level. In order to avoid getting in that situation, let's have a per-interrupt flag to remember if we have already activated that interrupt or not. Fixes: f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early") Reported-and-tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1484668848-24361-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/uapi/asm-generic/unistd.h')