/* * This header provides macros for Palmas device bindings. * * Copyright (c) 2013, NVIDIA Corporation. * * Author: Laxman Dewangan * */ #ifndef __DT_BINDINGS_PALMAS_H #define __DT_BINDINGS_PALMAS_H /* External control pins */ #define PALMAS_EXT_CONTROL_PIN_ENABLE1 1 #define PALMAS_EXT_CONTROL_PIN_ENABLE2 2 #define PALMAS_EXT_CONTROL_PIN_NSLEEP 3 #endif /* __DT_BINDINGS_PALMAS_H */ anz.ch/linux/net-next.git' title='net-next.git Git repository'/>
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /net/ieee802154/Kconfig
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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