/* * This header provides constants for hisilicon pinctrl bindings. * * Copyright (c) 2015 Hisilicon Limited. * Copyright (c) 2015 Linaro Limited. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_PINCTRL_HISI_H #define _DT_BINDINGS_PINCTRL_HISI_H /* iomg bit definition */ #define MUX_M0 0 #define MUX_M1 1 #define MUX_M2 2 #define MUX_M3 3 #define MUX_M4 4 #define MUX_M5 5 #define MUX_M6 6 #define MUX_M7 7 /* iocg bit definition */ #define PULL_MASK (3) #define PULL_DIS (0) #define PULL_UP (1 << 0) #define PULL_DOWN (1 << 1) /* drive strength definition */ #define DRIVE_MASK (7 << 4) #define DRIVE1_02MA (0 << 4) #define DRIVE1_04MA (1 << 4) #define DRIVE1_08MA (2 << 4) #define DRIVE1_10MA (3 << 4) #define DRIVE2_02MA (0 << 4) #define DRIVE2_04MA (1 << 4) #define DRIVE2_08MA (2 << 4) #define DRIVE2_10MA (3 << 4) #define DRIVE3_04MA (0 << 4) #define DRIVE3_08MA (1 << 4) #define DRIVE3_12MA (2 << 4) #define DRIVE3_16MA (3 << 4) #define DRIVE3_20MA (4 << 4) #define DRIVE3_24MA (5 << 4) #define DRIVE3_32MA (6 << 4) #define DRIVE3_40MA (7 << 4) #define DRIVE4_02MA (0 << 4) #define DRIVE4_04MA (2 << 4) #define DRIVE4_08MA (4 << 4) #define DRIVE4_10MA (6 << 4) #endif 3297aa714091'>refslogtreecommitdiff
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authorImre Deak <imre.deak@intel.com>2016-06-21 11:51:47 +0300
committerImre Deak <imre.deak@intel.com>2016-06-22 16:16:48 +0300
commit97a824e1565e55c5be69f4ab36eb3297aa714091 (patch)
tree090291cee1627db36667f6f1e73fc611b6863605
parent612515121b3e64f3bb060076d1799f1ce943630f (diff)
drm/i915/ibx, cpt: Don't attempt to register eDP if LVDS was detected
Atm on IBX/CPT we attempt to detect if eDP is present even if LVDS was already detected and an encoder for it was registered. This involves trying to read out the eDP DPCD, which in turn needs the same power sequencer that LVDS uses. Poking at the VDD line at an unexpected time may or may not interfere with the LVDS panel, but it's probably safer to prevent this. Registering both an LVDS and an eDP connector would also present a similar problem accessing the shared PPS at any point later in an unexpected way. We also need this to be able fix PPS initialization before its first use in the next patch. For that we want to be sure that PPS is not in use by LVDS. v2: - Split out the PPS init fix to a separate patch. (Chris) - Add comment about eDP init depending on LVDS init. (Chris) - Make the use of the intel_encoder ptr less error prone. v3: - Use IBX/CPT reference instead of the incorrect ILK, add a WARN about this. (Ville) v4: - Use a helper to get the lvds encoder instead of opencoding the same. (Ville) CC: Ville Syrjälä <ville.syrjala@linux.intel.com> CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v2) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v3) Link: http://patchwork.freedesktop.org/patch/msgid/1466499109-20240-2-git-send-email-imre.deak@intel.com
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