/* * This header provides constants for hisilicon pinctrl bindings. * * Copyright (c) 2015 Hisilicon Limited. * Copyright (c) 2015 Linaro Limited. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_PINCTRL_HISI_H #define _DT_BINDINGS_PINCTRL_HISI_H /* iomg bit definition */ #define MUX_M0 0 #define MUX_M1 1 #define MUX_M2 2 #define MUX_M3 3 #define MUX_M4 4 #define MUX_M5 5 #define MUX_M6 6 #define MUX_M7 7 /* iocg bit definition */ #define PULL_MASK (3) #define PULL_DIS (0) #define PULL_UP (1 << 0) #define PULL_DOWN (1 << 1) /* drive strength definition */ #define DRIVE_MASK (7 << 4) #define DRIVE1_02MA (0 << 4) #define DRIVE1_04MA (1 << 4) #define DRIVE1_08MA (2 << 4) #define DRIVE1_10MA (3 << 4) #define DRIVE2_02MA (0 << 4) #define DRIVE2_04MA (1 << 4) #define DRIVE2_08MA (2 << 4) #define DRIVE2_10MA (3 << 4) #define DRIVE3_04MA (0 << 4) #define DRIVE3_08MA (1 << 4) #define DRIVE3_12MA (2 << 4) #define DRIVE3_16MA (3 << 4) #define DRIVE3_20MA (4 << 4) #define DRIVE3_24MA (5 << 4) #define DRIVE3_32MA (6 << 4) #define DRIVE3_40MA (7 << 4) #define DRIVE4_02MA (0 << 4) #define DRIVE4_04MA (2 << 4) #define DRIVE4_08MA (4 << 4) #define DRIVE4_10MA (6 << 4) #endif db6f6aab499d02420082f436abf3238'>refslogtreecommitdiff
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authorTony Lindgren <tony@atomide.com>2017-01-24 09:18:57 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-01-25 11:02:29 +0100
commit407788b51db6f6aab499d02420082f436abf3238 (patch)
treeb2fb3c885baf47cd2bd8ee0429f423b352e11905 /include/net
parent7a308bb3016f57e5be11a677d15b821536419d36 (diff)
usb: musb: Fix host mode error -71 regression
Commit 467d5c980709 ("usb: musb: Implement session bit based runtime PM for musb-core") started implementing musb generic runtime PM support by introducing devctl register session bit based state control. This caused a regression where if a USB mass storage device is connected to a USB hub, we can get: usb 1-1: reset high-speed USB device number 2 using musb-hdrc usb 1-1: device descriptor read/64, error -71 usb 1-1.1: new high-speed USB device number 4 using musb-hdrc This is because before the USB storage device is connected, musb is in OTG_STATE_A_SUSPEND. And we currently only set need_finish_resume in musb_stage0_irq() and the related code calling finish_resume_work in musb_resume() and musb_runtime_resume() never gets called. To fix the issue, we can call schedule_delayed_work() directly in musb_stage0_irq() to have finish_resume_work run. And we should no longer never get interrupts when when suspended. We have changed musb to no longer need pm_runtime_irqsafe(). The need_finish_resume flag was added in commit 9298b4aad37e ("usb: musb: fix device hotplug behind hub") and no longer applies as far as I can tell. So let's just remove the earlier code that no longer is needed. Fixes: 467d5c980709 ("usb: musb: Implement session bit based runtime PM for musb-core") Reported-by: Bin Liu <b-liu@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bin Liu <b-liu@ti.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/net')