/*
* Copyright (C) 2015 MediaTek Inc.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_POWER_MT2701_POWER_H
#define _DT_BINDINGS_POWER_MT2701_POWER_H
#define MT2701_POWER_DOMAIN_CONN 0
#define MT2701_POWER_DOMAIN_DISP 1
#define MT2701_POWER_DOMAIN_MFG 2
#define MT2701_POWER_DOMAIN_VDEC 3
#define MT2701_POWER_DOMAIN_ISP 4
#define MT2701_POWER_DOMAIN_BDP 5
#define MT2701_POWER_DOMAIN_ETH 6
#define MT2701_POWER_DOMAIN_HIF 7
#define MT2701_POWER_DOMAIN_IFR_MSC 8
#endif /* _DT_BINDINGS_POWER_MT2701_POWER_H */
bee6c1e788218fd1d141db320db970aace7f0'/>
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth")
the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with
the *enum* declaring the EESR bits (interrupt status) WRT bit naming and
formatting. I'd like to restore the consistency by using EESIPR as the bit
name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the
bits according to the available Renesas SH77{34|63} manuals; additionally,
reconstruct couple names using the EESR bit declaration above...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>