/* * Copyright (C) 2016 Glider bvba * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. */ #ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7791_SYSC_H__ /* * These power domain indices match the numbers of the interrupt bits * representing the power areas in the various Interrupt Registers * (e.g. SYSCISR, Interrupt Status Register) */ #define R8A7791_PD_CA15_CPU0 0 #define R8A7791_PD_CA15_CPU1 1 #define R8A7791_PD_CA15_SCU 12 #define R8A7791_PD_SH_4A 16 #define R8A7791_PD_SGX 20 /* Always-on power area */ #define R8A7791_PD_ALWAYS_ON 32 #endif /* __DT_BINDINGS_POWER_R8A7791_SYSC_H__ */ i/'>index : net-next.git
net-next plumbingsTobias Klauser
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /include/trace/events/fib6.h
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/trace/events/fib6.h')