/* * Copyright (c) 2014 MediaTek Inc. * Author: Flora Fu, MediaTek * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8173 #define _DT_BINDINGS_RESET_CONTROLLER_MT8173 /* INFRACFG resets */ #define MT8173_INFRA_EMI_REG_RST 0 #define MT8173_INFRA_DRAMC0_A0_RST 1 #define MT8173_INFRA_APCIRQ_EINT_RST 3 #define MT8173_INFRA_APXGPT_RST 4 #define MT8173_INFRA_SCPSYS_RST 5 #define MT8173_INFRA_KP_RST 6 #define MT8173_INFRA_PMIC_WRAP_RST 7 #define MT8173_INFRA_MPIP_RST 8 #define MT8173_INFRA_CEC_RST 9 #define MT8173_INFRA_EMI_RST 32 #define MT8173_INFRA_DRAMC0_RST 34 #define MT8173_INFRA_APMIXEDSYS_RST 35 #define MT8173_INFRA_MIPI_DSI_RST 36 #define MT8173_INFRA_TRNG_RST 37 #define MT8173_INFRA_SYSIRQ_RST 38 #define MT8173_INFRA_MIPI_CSI_RST 39 #define MT8173_INFRA_GCE_FAXI_RST 40 #define MT8173_INFRA_MMIOMMURST 47 /* PERICFG resets */ #define MT8173_PERI_UART0_SW_RST 0 #define MT8173_PERI_UART1_SW_RST 1 #define MT8173_PERI_UART2_SW_RST 2 #define MT8173_PERI_UART3_SW_RST 3 #define MT8173_PERI_IRRX_SW_RST 4 #define MT8173_PERI_PWM_SW_RST 8 #define MT8173_PERI_AUXADC_SW_RST 10 #define MT8173_PERI_DMA_SW_RST 11 #define MT8173_PERI_I2C6_SW_RST 13 #define MT8173_PERI_NFI_SW_RST 14 #define MT8173_PERI_THERM_SW_RST 16 #define MT8173_PERI_MSDC2_SW_RST 17 #define MT8173_PERI_MSDC3_SW_RST 18 #define MT8173_PERI_MSDC0_SW_RST 19 #define MT8173_PERI_MSDC1_SW_RST 20 #define MT8173_PERI_I2C0_SW_RST 22 #define MT8173_PERI_I2C1_SW_RST 23 #define MT8173_PERI_I2C2_SW_RST 24 #define MT8173_PERI_I2C3_SW_RST 25 #define MT8173_PERI_I2C4_SW_RST 26 #define MT8173_PERI_HDMI_SW_RST 29 #define MT8173_PERI_SPI0_SW_RST 33 #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8173 */ input type='hidden' name='id' value='10bbe7599e2755d3f3e100103967788b8b5a4bce'/>
path: root/include/dt-bindings/clock/r8a7790-clock.h
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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-25 14:01:28 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-25 14:01:28 -0800
commit10bbe7599e2755d3f3e100103967788b8b5a4bce (patch)
treef4d5bc444584dc211c5797be5aad5e861c9181b3 /include/dt-bindings/clock/r8a7790-clock.h
parent62906027091f1d02de44041524f0769f60bb9cf3 (diff)
parent6886fee4d7a3afaf905a8e0bec62dc8fdc39878d (diff)
Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
Pull turbostat updates from Len Brown. * 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: tools/power turbostat: remove obsolete -M, -m, -C, -c options tools/power turbostat: Make extensible via the --add parameter tools/power turbostat: Denverton uses a 25 MHz crystal, not 19.2 MHz tools/power turbostat: line up headers when -M is used tools/power turbostat: fix SKX PKG_CSTATE_LIMIT decoding tools/power turbostat: Support Knights Mill (KNM) tools/power turbostat: Display HWP OOB status tools/power turbostat: fix Denverton BCLK tools/power turbostat: use intel-family.h model strings tools/power/turbostat: Add Denverton RAPL support tools/power/turbostat: Add Denverton support tools/power/turbostat: split core MSR support into status + limit tools/power turbostat: fix error case overflow read of slm_freq_table[] tools/power turbostat: Allocate correct amount of fd and irq entries tools/power turbostat: switch to tab delimited output tools/power turbostat: Gracefully handle ACPI S3 tools/power turbostat: tidy up output on Joule counter overflow
Diffstat (limited to 'include/dt-bindings/clock/r8a7790-clock.h')