/*
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_RESET_MSM_GCC_8974_H
#define _DT_BINDINGS_RESET_MSM_GCC_8974_H
#define GCC_SYSTEM_NOC_BCR 0
#define GCC_CONFIG_NOC_BCR 1
#define GCC_PERIPH_NOC_BCR 2
#define GCC_IMEM_BCR 3
#define GCC_MMSS_BCR 4
#define GCC_QDSS_BCR 5
#define GCC_USB_30_BCR 6
#define GCC_USB3_PHY_BCR 7
#define GCC_USB_HS_HSIC_BCR 8
#define GCC_USB_HS_BCR 9
#define GCC_USB2A_PHY_BCR 10
#define GCC_USB2B_PHY_BCR 11
#define GCC_SDCC1_BCR 12
#define GCC_SDCC2_BCR 13
#define GCC_SDCC3_BCR 14
#define GCC_SDCC4_BCR 15
#define GCC_BLSP1_BCR 16
#define GCC_BLSP1_QUP1_BCR 17
#define GCC_BLSP1_UART1_BCR 18
#define GCC_BLSP1_QUP2_BCR 19
#define GCC_BLSP1_UART2_BCR 20
#define GCC_BLSP1_QUP3_BCR 21
#define GCC_BLSP1_UART3_BCR 22
#define GCC_BLSP1_QUP4_BCR 23
#define GCC_BLSP1_UART4_BCR 24
#define GCC_BLSP1_QUP5_BCR 25
#define GCC_BLSP1_UART5_BCR 26
#define GCC_BLSP1_QUP6_BCR 27
#define GCC_BLSP1_UART6_BCR 28
#define GCC_BLSP2_BCR 29
#define GCC_BLSP2_QUP1_BCR 30
#define GCC_BLSP2_UART1_BCR 31
#define GCC_BLSP2_QUP2_BCR 32
#define GCC_BLSP2_UART2_BCR 33
#define GCC_BLSP2_QUP3_BCR 34
#define GCC_BLSP2_UART3_BCR 35
#define GCC_BLSP2_QUP4_BCR 36
#define GCC_BLSP2_UART4_BCR 37
#define GCC_BLSP2_QUP5_BCR 38
#define GCC_BLSP2_UART5_BCR 39
#define GCC_BLSP2_QUP6_BCR 40
#define GCC_BLSP2_UART6_BCR 41
#define GCC_PDM_BCR 42
#define GCC_BAM_DMA_BCR 43
#define GCC_TSIF_BCR 44
#define GCC_TCSR_BCR 45
#define GCC_BOOT_ROM_BCR 46
#define GCC_MSG_RAM_BCR 47
#define GCC_TLMM_BCR 48
#define GCC_MPM_BCR 49
#define GCC_SEC_CTRL_BCR 50
#define GCC_SPMI_BCR 51
#define GCC_SPDM_BCR 52
#define GCC_CE1_BCR 53
#define GCC_CE2_BCR 54
#define GCC_BIMC_BCR 55
#define GCC_MPM_NON_AHB_RESET 56
#define GCC_MPM_AHB_RESET 57
#define GCC_SNOC_BUS_TIMEOUT0_BCR 58
#define GCC_SNOC_BUS_TIMEOUT2_BCR 59
#define GCC_PNOC_BUS_TIMEOUT0_BCR 60
#define GCC_PNOC_BUS_TIMEOUT1_BCR 61
#define GCC_PNOC_BUS_TIMEOUT2_BCR 62
#define GCC_PNOC_BUS_TIMEOUT3_BCR 63
#define GCC_PNOC_BUS_TIMEOUT4_BCR 64
#define GCC_CNOC_BUS_TIMEOUT0_BCR 65
#define GCC_CNOC_BUS_TIMEOUT1_BCR 66
#define GCC_CNOC_BUS_TIMEOUT2_BCR 67
#define GCC_CNOC_BUS_TIMEOUT3_BCR 68
#define GCC_CNOC_BUS_TIMEOUT4_BCR 69
#define GCC_CNOC_BUS_TIMEOUT5_BCR 70
#define GCC_CNOC_BUS_TIMEOUT6_BCR 71
#define GCC_DEHR_BCR 72
#define GCC_RBCPR_BCR 73
#define GCC_MSS_RESTART 74
#define GCC_LPASS_RESTART 75
#define GCC_WCSS_RESTART 76
#define GCC_VENUS_RESTART 77
#endif
et/irda?id=39cb2c9a316e77f6dfba96c543e55b6672d5a37e'>irda/ircomm_ttp.h
drm/i915: Check for NULL i915_vma in intel_unpin_fb_obj()
I've seen this trigger twice now, where the i915_gem_object_to_ggtt()
call in intel_unpin_fb_obj() returns NULL, resulting in an oops
immediately afterwards as the (inlined) call to i915_vma_unpin_fence()
tries to dereference it.
It seems to be some race condition where the object is going away at
shutdown time, since both times happened when shutting down the X
server. The call chains were different:
- VT ioctl(KDSETMODE, KD_TEXT):
intel_cleanup_plane_fb+0x5b/0xa0 [i915]
drm_atomic_helper_cleanup_planes+0x6f/0x90 [drm_kms_helper]
intel_atomic_commit_tail+0x749/0xfe0 [i915]
intel_atomic_commit+0x3cb/0x4f0 [i915]
drm_atomic_commit+0x4b/0x50 [drm]
restore_fbdev_mode+0x14c/0x2a0 [drm_kms_helper]
drm_fb_helper_restore_fbdev_mode_unlocked+0x34/0x80 [drm_kms_helper]
drm_fb_helper_set_par+0x2d/0x60 [drm_kms_helper]
intel_fbdev_set_par+0x18/0x70 [i915]
fb_set_var+0x236/0x460
fbcon_blank+0x30f/0x350
do_unblank_screen+0xd2/0x1a0
vt_ioctl+0x507/0x12a0
tty_ioctl+0x355/0xc30
do_vfs_ioctl+0xa3/0x5e0
SyS_ioctl+0x79/0x90
entry_SYSCALL_64_fastpath+0x13/0x94
- i915 unpin_work workqueue:
intel_unpin_work_fn+0x58/0x140 [i915]
process_one_work+0x1f1/0x480
worker_thread+0x48/0x4d0
kthread+0x101/0x140
and this patch purely papers over the issue by adding a NULL pointer
check and a WARN_ON_ONCE() to avoid the oops that would then generally
make the machine unresponsive.
Other callers of i915_gem_object_to_ggtt() seem to also check for the
returned pointer being NULL and warn about it, so this clearly has
happened before in other places.
[ Reported it originally to the i915 developers on Jan 8, applying the
ugly workaround on my own now after triggering the problem for the
second time with no feedback.
This is likely to be the same bug reported as
https://bugs.freedesktop.org/show_bug.cgi?id=98829
https://bugs.freedesktop.org/show_bug.cgi?id=99134
which has a patch for the underlying problem, but it hasn't gotten to
me, so I'm applying the workaround. ]
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>