/* * Copyright (c) 2013, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_RESET_MSM_MMCC_8960_H #define _DT_BINDINGS_RESET_MSM_MMCC_8960_H #define VPE_AXI_RESET 0 #define IJPEG_AXI_RESET 1 #define MPD_AXI_RESET 2 #define VFE_AXI_RESET 3 #define SP_AXI_RESET 4 #define VCODEC_AXI_RESET 5 #define ROT_AXI_RESET 6 #define VCODEC_AXI_A_RESET 7 #define VCODEC_AXI_B_RESET 8 #define FAB_S3_AXI_RESET 9 #define FAB_S2_AXI_RESET 10 #define FAB_S1_AXI_RESET 11 #define FAB_S0_AXI_RESET 12 #define SMMU_GFX3D_ABH_RESET 13 #define SMMU_VPE_AHB_RESET 14 #define SMMU_VFE_AHB_RESET 15 #define SMMU_ROT_AHB_RESET 16 #define SMMU_VCODEC_B_AHB_RESET 17 #define SMMU_VCODEC_A_AHB_RESET 18 #define SMMU_MDP1_AHB_RESET 19 #define SMMU_MDP0_AHB_RESET 20 #define SMMU_JPEGD_AHB_RESET 21 #define SMMU_IJPEG_AHB_RESET 22 #define SMMU_GFX2D0_AHB_RESET 23 #define SMMU_GFX2D1_AHB_RESET 24 #define APU_AHB_RESET 25 #define CSI_AHB_RESET 26 #define TV_ENC_AHB_RESET 27 #define VPE_AHB_RESET 28 #define FABRIC_AHB_RESET 29 #define GFX2D0_AHB_RESET 30 #define GFX2D1_AHB_RESET 31 #define GFX3D_AHB_RESET 32 #define HDMI_AHB_RESET 33 #define MSSS_IMEM_AHB_RESET 34 #define IJPEG_AHB_RESET 35 #define DSI_M_AHB_RESET 36 #define DSI_S_AHB_RESET 37 #define JPEGD_AHB_RESET 38 #define MDP_AHB_RESET 39 #define ROT_AHB_RESET 40 #define VCODEC_AHB_RESET 41 #define VFE_AHB_RESET 42 #define DSI2_M_AHB_RESET 43 #define DSI2_S_AHB_RESET 44 #define CSIPHY2_RESET 45 #define CSI_PIX1_RESET 46 #define CSIPHY0_RESET 47 #define CSIPHY1_RESET 48 #define DSI2_RESET 49 #define VFE_CSI_RESET 50 #define MDP_RESET 51 #define AMP_RESET 52 #define JPEGD_RESET 53 #define CSI1_RESET 54 #define VPE_RESET 55 #define MMSS_FABRIC_RESET 56 #define VFE_RESET 57 #define GFX2D0_RESET 58 #define GFX2D1_RESET 59 #define GFX3D_RESET 60 #define HDMI_RESET 61 #define MMSS_IMEM_RESET 62 #define IJPEG_RESET 63 #define CSI0_RESET 64 #define DSI_RESET 65 #define VCODEC_RESET 66 #define MDP_TV_RESET 67 #define MDP_VSYNC_RESET 68 #define ROT_RESET 69 #define TV_HDMI_RESET 70 #define TV_ENC_RESET 71 #define CSI2_RESET 72 #define CSI_RDI1_RESET 73 #define CSI_RDI2_RESET 74 #define GFX3D_AXI_RESET 75 #define VCAP_AXI_RESET 76 #define SMMU_VCAP_AHB_RESET 77 #define VCAP_AHB_RESET 78 #define CSI_RDI_RESET 79 #define CSI_PIX_RESET 80 #define VCAP_NPL_RESET 81 #define VCAP_RESET 82 #endif aed'>omap/omap-mcbsp.h
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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2017-01-31 10:25:25 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-01-31 13:41:46 +0100
commit92c715fca907686f5298220ece53423e38ba3aed (patch)
tree286158fdad04c9b54955350abb95d4f1c0dc860a /sound/soc/omap/omap-mcbsp.h
parente6e7b48b295afa5a5ab440de0a94d9ad8b3ce2d0 (diff)
drm/atomic: Fix double free in drm_atomic_state_default_clear
drm_atomic_helper_page_flip and drm_atomic_ioctl set their own events in crtc_state->event. But when it's set the event is freed in 2 places. Solve this by only freeing the event in the atomic ioctl when it allocated its own event. This has been broken twice. The first time when the code was introduced, but only in the corner case when an event is allocated, but more crtc's were included by atomic check and then failing. This can mostly happen when you do an atomic modeset in i915 and the display clock is changed, which forces all crtc's to be included to the state. This has been broken worse by adding in-fences support, which caused the double free to be done unconditionally. [IGT] kms_rotation_crc: starting subtest primary-rotation-180 ============================================================================= BUG kmalloc-128 (Tainted: G U ): Object already free ----------------------------------------------------------------------------- Disabling lock debugging due to kernel taint INFO: Allocated in drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] age=0 cpu=3 pid=1529 ___slab_alloc+0x308/0x3b0 __slab_alloc+0xd/0x20 kmem_cache_alloc_trace+0x92/0x1c0 drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] intel_atomic_commit+0x35/0x4f0 [i915] drm_atomic_commit+0x46/0x50 [drm] drm_mode_atomic_ioctl+0x7d4/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Freed in drm_event_cancel_free+0xa3/0xb0 [drm] age=0 cpu=3 pid=1529 __slab_free+0x48/0x2e0 kfree+0x159/0x1a0 drm_event_cancel_free+0xa3/0xb0 [drm] drm_mode_atomic_ioctl+0x86d/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Slab 0xffffde1f0997b080 objects=17 used=2 fp=0xffff92fb65ec2578 flags=0x200000000008101 INFO: Object 0xffff92fb65ec2578 @offset=1400 fp=0xffff92fb65ec2ae8 Redzone ffff92fb65ec2570: bb bb bb bb bb bb bb bb ........ Object ffff92fb65ec2578: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2588: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2598: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25a8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25b8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25c8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25d8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25e8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk. Redzone ffff92fb65ec25f8: bb bb bb bb bb bb bb bb ........ Padding ffff92fb65ec2738: 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZ CPU: 3 PID: 180 Comm: kworker/3:2 Tainted: G BU 4.10.0-rc6-patser+ #5039 Hardware name: /NUC5PPYB, BIOS PYBSWCEL.86A.0031.2015.0601.1712 06/01/2015 Workqueue: events intel_atomic_helper_free_state [i915] Call Trace: dump_stack+0x4d/0x6d print_trailer+0x20c/0x220 free_debug_processing+0x1c6/0x330 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] __slab_free+0x48/0x2e0 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] kfree+0x159/0x1a0 drm_atomic_state_default_clear+0xf7/0x1c0 [drm] ? drm_atomic_state_clear+0x30/0x30 [drm] intel_atomic_state_clear+0xd/0x20 [i915] drm_atomic_state_clear+0x1a/0x30 [drm] __drm_atomic_state_free+0x13/0x60 [drm] intel_atomic_helper_free_state+0x5d/0x70 [i915] process_one_work+0x260/0x4a0 worker_thread+0x2d1/0x4f0 kthread+0x127/0x130 ? process_one_work+0x4a0/0x4a0 ? kthread_stop+0x120/0x120 ret_from_fork+0x29/0x40 FIX kmalloc-128: Object at 0xffff92fb65ec2578 not freed Fixes: 3b24f7d67581 ("drm/atomic: Add struct drm_crtc_commit to track async updates") Fixes: 9626014258a5 ("drm/fence: add in-fences support") Cc: <stable@vger.kernel.org> # v4.8+ Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1485854725-27640-1-git-send-email-maarten.lankhorst@linux.intel.com
Diffstat (limited to 'sound/soc/omap/omap-mcbsp.h')