/* * Copyright (C) 2016 Chen-Yu Tsai * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _DT_BINDINGS_RST_SUN6I_A31_H_ #define _DT_BINDINGS_RST_SUN6I_A31_H_ #define RST_USB_PHY0 0 #define RST_USB_PHY1 1 #define RST_USB_PHY2 2 #define RST_AHB1_MIPI_DSI 3 #define RST_AHB1_SS 4 #define RST_AHB1_DMA 5 #define RST_AHB1_MMC0 6 #define RST_AHB1_MMC1 7 #define RST_AHB1_MMC2 8 #define RST_AHB1_MMC3 9 #define RST_AHB1_NAND1 10 #define RST_AHB1_NAND0 11 #define RST_AHB1_SDRAM 12 #define RST_AHB1_EMAC 13 #define RST_AHB1_TS 14 #define RST_AHB1_HSTIMER 15 #define RST_AHB1_SPI0 16 #define RST_AHB1_SPI1 17 #define RST_AHB1_SPI2 18 #define RST_AHB1_SPI3 19 #define RST_AHB1_OTG 20 #define RST_AHB1_EHCI0 21 #define RST_AHB1_EHCI1 22 #define RST_AHB1_OHCI0 23 #define RST_AHB1_OHCI1 24 #define RST_AHB1_OHCI2 25 #define RST_AHB1_VE 26 #define RST_AHB1_LCD0 27 #define RST_AHB1_LCD1 28 #define RST_AHB1_CSI 29 #define RST_AHB1_HDMI 30 #define RST_AHB1_BE0 31 #define RST_AHB1_BE1 32 #define RST_AHB1_FE0 33 #define RST_AHB1_FE1 34 #define RST_AHB1_MP 35 #define RST_AHB1_GPU 36 #define RST_AHB1_DEU0 37 #define RST_AHB1_DEU1 38 #define RST_AHB1_DRC0 39 #define RST_AHB1_DRC1 40 #define RST_AHB1_LVDS 41 #define RST_APB1_CODEC 42 #define RST_APB1_SPDIF 43 #define RST_APB1_DIGITAL_MIC 44 #define RST_APB1_DAUDIO0 45 #define RST_APB1_DAUDIO1 46 #define RST_APB2_I2C0 47 #define RST_APB2_I2C1 48 #define RST_APB2_I2C2 49 #define RST_APB2_I2C3 50 #define RST_APB2_UART0 51 #define RST_APB2_UART1 52 #define RST_APB2_UART2 53 #define RST_APB2_UART3 54 #define RST_APB2_UART4 55 #define RST_APB2_UART5 56 #endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */ 3c16003f50d7e8d74b02d0a143'>adc
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authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /include/dt-bindings/iio/adc
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'include/dt-bindings/iio/adc')