/* mt9t112 Camera * * Copyright (C) 2009 Renesas Solutions Corp. * Kuninori Morimoto * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __MT9T112_H__ #define __MT9T112_H__ #define MT9T112_FLAG_PCLK_RISING_EDGE (1 << 0) #define MT9T112_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */ struct mt9t112_pll_divider { u8 m, n; u8 p1, p2, p3, p4, p5, p6, p7; }; /* * mt9t112 camera info */ struct mt9t112_camera_info { u32 flags; struct mt9t112_pll_divider divider; }; #endif /* __MT9T112_H__ */ f='/cgit.cgi/'>cgit logo index : net-next.git
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authorVenkat Reddy Talla <vreddytalla@nvidia.com>2016-11-17 23:24:35 +0530
committerMark Brown <broonie@kernel.org>2016-11-23 16:27:24 +0000
commit383d0fca7035a12f1201277d33e8fc87c9d60c9a (patch)
treebb12c78d91ab8d69ae18fbbf4033277481b277ad /net/ipx/Kconfig
parent9a40cb0cb8b55ecfdcd3cec1381bcc46ec488588 (diff)
regulator: max77620: add support to configure MPOK
Adding support to configure regulator POK mapping bit to control nRST_IO and GPIO1 POK function. In tegra based platform which uses MAX20024 pmic, when some of regulators are configured FPS_NONE(flexible power sequencer) causes PMIC GPIO1 to go low which lead to various other rails turning off, to avoid this MPOK bit of those regulators need to be set to 0 so that PMIC GPIO1 will not go low. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'net/ipx/Kconfig')