#ifndef __NETNS_XFRM_H #define __NETNS_XFRM_H #include #include #include #include #include #include struct ctl_table_header; struct xfrm_policy_hash { struct hlist_head __rcu *table; unsigned int hmask; u8 dbits4; u8 sbits4; u8 dbits6; u8 sbits6; }; struct xfrm_policy_hthresh { struct work_struct work; seqlock_t lock; u8 lbits4; u8 rbits4; u8 lbits6; u8 rbits6; }; struct netns_xfrm { struct list_head state_all; /* * Hash table to find appropriate SA towards given target (endpoint of * tunnel or destination of transport mode) allowed by selector. * * Main use is finding SA after policy selected tunnel or transport * mode. Also, it can be used by ah/esp icmp error handler to find * offending SA. */ struct hlist_head __rcu *state_bydst; struct hlist_head __rcu *state_bysrc; struct hlist_head __rcu *state_byspi; unsigned int state_hmask; unsigned int state_num; struct work_struct state_hash_work; struct list_head policy_all; struct hlist_head *policy_byidx; unsigned int policy_idx_hmask; struct hlist_head policy_inexact[XFRM_POLICY_MAX]; struct xfrm_policy_hash policy_bydst[XFRM_POLICY_MAX]; unsigned int policy_count[XFRM_POLICY_MAX * 2]; struct work_struct policy_hash_work; struct xfrm_policy_hthresh policy_hthresh; struct sock *nlsk; struct sock *nlsk_stash; u32 sysctl_aevent_etime; u32 sysctl_aevent_rseqth; int sysctl_larval_drop; u32 sysctl_acq_expires; #ifdef CONFIG_SYSCTL struct ctl_table_header *sysctl_hdr; #endif struct dst_ops xfrm4_dst_ops; #if IS_ENABLED(CONFIG_IPV6) struct dst_ops xfrm6_dst_ops; #endif spinlock_t xfrm_state_lock; spinlock_t xfrm_policy_lock; struct mutex xfrm_cfg_mutex; /* flow cache part */ struct flow_cache flow_cache_global; atomic_t flow_cache_genid; struct list_head flow_cache_gc_list; atomic_t flow_cache_gc_count; spinlock_t flow_cache_gc_lock; struct work_struct flow_cache_gc_work; struct work_struct flow_cache_flush_work; struct mutex flow_flush_sem; }; #endif ce40249d2aa1508de69a283f9ca9285849cb3'/>
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authorYakir Yang <ykk@rock-chips.com>2016-06-28 12:51:15 +0800
committerThierry Reding <treding@nvidia.com>2016-07-11 14:30:41 +0200
commitc5ece40249d2aa1508de69a283f9ca9285849cb3 (patch)
tree730d328ccd444b92d8ac2f917c7e03af32e7f957
parent211cb82e4c6974d43b5836fcc4aadbd10311152e (diff)
drm/panel: simple: Add support for LG LP079QX1-SP0V panel
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and 32 pins eDP interface. This module supports 1536x2048 mode. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Thierry Reding <treding@nvidia.com>