#ifndef __NET_PKT_SCHED_H #define __NET_PKT_SCHED_H #include #include #include #include #define DEFAULT_TX_QUEUE_LEN 1000 struct qdisc_walker { int stop; int skip; int count; int (*fn)(struct Qdisc *, unsigned long cl, struct qdisc_walker *); }; #define QDISC_ALIGNTO 64 #define QDISC_ALIGN(len) (((len) + QDISC_ALIGNTO-1) & ~(QDISC_ALIGNTO-1)) static inline void *qdisc_priv(struct Qdisc *q) { return (char *) q + QDISC_ALIGN(sizeof(struct Qdisc)); } /* Timer resolution MUST BE < 10% of min_schedulable_packet_size/bandwidth Normal IP packet size ~ 512byte, hence: 0.5Kbyte/1Mbyte/sec = 0.5msec, so that we need 50usec timer for 10Mbit ethernet. 10msec resolution -> <50Kbit/sec. The result: [34]86 is not good choice for QoS router :-( The things are not so bad, because we may use artificial clock evaluated by integration of network data flow in the most critical places. */ typedef u64 psched_time_t; typedef long psched_tdiff_t; /* Avoid doing 64 bit divide */ #define PSCHED_SHIFT 6 #define PSCHED_TICKS2NS(x) ((s64)(x) << PSCHED_SHIFT) #define PSCHED_NS2TICKS(x) ((x) >> PSCHED_SHIFT) #define PSCHED_TICKS_PER_SEC PSCHED_NS2TICKS(NSEC_PER_SEC) #define PSCHED_PASTPERFECT 0 static inline psched_time_t psched_get_time(void) { return PSCHED_NS2TICKS(ktime_get_ns()); } static inline psched_tdiff_t psched_tdiff_bounded(psched_time_t tv1, psched_time_t tv2, psched_time_t bound) { return min(tv1 - tv2, bound); } struct qdisc_watchdog { u64 last_expires; struct hrtimer timer; struct Qdisc *qdisc; }; void qdisc_watchdog_init(struct qdisc_watchdog *wd, struct Qdisc *qdisc); void qdisc_watchdog_schedule_ns(struct qdisc_watchdog *wd, u64 expires); static inline void qdisc_watchdog_schedule(struct qdisc_watchdog *wd, psched_time_t expires) { qdisc_watchdog_schedule_ns(wd, PSCHED_TICKS2NS(expires)); } void qdisc_watchdog_cancel(struct qdisc_watchdog *wd); extern struct Qdisc_ops pfifo_qdisc_ops; extern struct Qdisc_ops bfifo_qdisc_ops; extern struct Qdisc_ops pfifo_head_drop_qdisc_ops; int fifo_set_limit(struct Qdisc *q, unsigned int limit); struct Qdisc *fifo_create_dflt(struct Qdisc *sch, struct Qdisc_ops *ops, unsigned int limit); int register_qdisc(struct Qdisc_ops *qops); int unregister_qdisc(struct Qdisc_ops *qops); void qdisc_get_default(char *id, size_t len); int qdisc_set_default(const char *id); void qdisc_hash_add(struct Qdisc *q); void qdisc_hash_del(struct Qdisc *q); struct Qdisc *qdisc_lookup(struct net_device *dev, u32 handle); struct Qdisc *qdisc_lookup_class(struct net_device *dev, u32 handle); struct qdisc_rate_table *qdisc_get_rtab(struct tc_ratespec *r, struct nlattr *tab); void qdisc_put_rtab(struct qdisc_rate_table *tab); void qdisc_put_stab(struct qdisc_size_table *tab); void qdisc_warn_nonwc(const char *txt, struct Qdisc *qdisc); int sch_direct_xmit(struct sk_buff *skb, struct Qdisc *q, struct net_device *dev, struct netdev_queue *txq, spinlock_t *root_lock, bool validate); void __qdisc_run(struct Qdisc *q); static inline void qdisc_run(struct Qdisc *q) { if (qdisc_run_begin(q)) __qdisc_run(q); } int tc_classify(struct sk_buff *skb, const struct tcf_proto *tp, struct tcf_result *res, bool compat_mode); static inline __be16 tc_skb_protocol(const struct sk_buff *skb) { /* We need to take extra care in case the skb came via * vlan accelerated path. In that case, use skb->vlan_proto * as the original vlan header was already stripped. */ if (skb_vlan_tag_present(skb)) return skb->vlan_proto; return skb->protocol; } /* Calculate maximal size of packet seen by hard_start_xmit routine of this device. */ static inline unsigned int psched_mtu(const struct net_device *dev) { return dev->mtu + dev->hard_header_len; } #endif td> -rw-r--r--at91.h751log plain -rw-r--r--ath79-clk.h479log plain -rw-r--r--axis,artpec6-clkctrl.h1112log plain -rw-r--r--bcm-cygnus.h3135log plain -rw-r--r--bcm-ns2.h2915log plain -rw-r--r--bcm-nsp.h2148log plain -rw-r--r--bcm21664.h1984log plain -rw-r--r--bcm281xx.h2456log plain -rw-r--r--bcm2835-aux.h635log plain -rw-r--r--bcm2835.h1962log plain -rw-r--r--berlin2.h1034log plain -rw-r--r--berlin2q.h695log plain -rw-r--r--clps711x-clock.h718log plain -rw-r--r--efm32-cmu.h1112log plain -rw-r--r--exynos-audss-clk.h597log plain -rw-r--r--exynos3250.h9083log plain -rw-r--r--exynos4.h8284log plain -rw-r--r--exynos4415.h9828log plain -rw-r--r--exynos5250.h4616log plain -rw-r--r--exynos5260-clk.h14876log plain -rw-r--r--exynos5410.h1689log plain -rw-r--r--exynos5420.h6857log plain -rw-r--r--exynos5433.h45372log plain -rw-r--r--exynos5440.h1141log plain -rw-r--r--exynos7-clk.h5281log plain -rw-r--r--gxbb-aoclkc.h2866log plain -rw-r--r--gxbb-clkc.h592log plain -rw-r--r--hi3516cv300-clock.h1668log plain -rw-r--r--hi3519-clock.h1328log plain -rw-r--r--hi3620-clock.h4496log plain -rw-r--r--hi6220-clock.h4508log plain -rw-r--r--hip04-clock.h1137log plain -rw-r--r--histb-clock.h2012log plain -rw-r--r--hix5hd2-clock.h2415log plain -rw-r--r--imx1-clock.h1055log plain -rw-r--r--imx21-clock.h2461log plain -rw-r--r--imx27-clock.h3494log plain -rw-r--r--imx5-clock.h7212log plain -rw-r--r--imx6qdl-clock.h9593log plain -rw-r--r--imx6sl-clock.h5849log plain -rw-r--r--imx6sx-clock.h9099log plain -rw-r--r--imx6ul-clock.h8203log plain -rw-r--r--imx7d-clock.h15974log plain -rw-r--r--jz4740-cgu.h1028log plain -rw-r--r--jz4780-cgu.h2470log plain -rw-r--r--lpc18xx-ccu.h2134log plain -rw-r--r--lpc18xx-cgu.h1142log plain -rw-r--r--lpc32xx-clock.h1633log plain -rw-r--r--lsi,axm5516-clks.h974log plain -rw-r--r--marvell,mmp2.h2022log plain -rw-r--r--marvell,pxa168.h1654log plain -rw-r--r--marvell,pxa1928.h1535log plain -rw-r--r--marvell,pxa910.h1598log plain -rw-r--r--maxim,max77620.h632log plain -rw-r--r--maxim,max77686.h648log plain -rw-r--r--maxim,max77802.h630log plain -rw-r--r--meson8b-clkc.h523log plain -rw-r--r--microchip,pic32-clock.h1150log plain -rw-r--r--mpc512x-clock.h2236log plain -rw-r--r--mt2701-clk.h13832log plain -rw-r--r--mt8135-clk.h5641log plain -rw-r--r--mt8173-clk.h9293log plain -rw-r--r--oxsemi,ox810se.h1002log plain -rw-r--r--oxsemi,ox820.h1203log plain -rw-r--r--pistachio-clk.h4863log plain -rw-r--r--pxa-clock.h1715log plain -rw-r--r--qcom,gcc-apq8084.h12872log plain -rw-r--r--qcom,gcc-ipq4019.h5423log plain -rw-r--r--qcom,gcc-ipq806x.h8574log plain -rw-r--r--qcom,gcc-mdm9615.h9497log plain -rw-r--r--qcom,gcc-msm8660.h7932log plain -rw-r--r--qcom,gcc-msm8916.h6190log plain -rw-r--r--qcom,gcc-msm8960.h9342log plain -rw-r--r--qcom,gcc-msm8974.h12340log plain -rw-r--r--qcom,gcc-msm8994.h4858log plain -rw-r--r--qcom,gcc-msm8996.h12575log plain -rw-r--r--qcom,lcc-ipq806x.h899log plain -rw-r--r--qcom,lcc-mdm9615.h1701log plain -rw-r--r--qcom,lcc-msm8960.h1616log plain -rw-r--r--qcom,mmcc-apq8084.h5722log plain -rw-r--r--qcom,mmcc-msm8960.h4109log plain -rw-r--r--qcom,mmcc-msm8974.h5223log plain -rw-r--r--qcom,mmcc-msm8996.h9403log plain -rw-r--r--qcom,rpmcc.h2101log plain -rw-r--r--r7s72100-clock.h1218log plain -rw-r--r--r8a73a4-clock.h1596log plain -rw-r--r--r8a7740-clock.h1992log plain -rw-r--r--r8a7743-cpg-mssr.h1269log plain -rw-r--r--r8a7745-cpg-mssr.h1298log plain -rw-r--r--r8a7778-clock.h1855log plain -rw-r--r--r8a7779-clock.h1647log plain -rw-r--r--r8a7790-clock.h4367log plain -rw-r--r--r8a7791-clock.h4388log plain -rw-r--r--r8a7792-clock.h2562log plain -rw-r--r--r8a7793-clock.h4561log plain -rw-r--r--r8a7794-clock.h3679log plain -rw-r--r--r8a7795-cpg-mssr.h1890log plain -rw-r--r--r8a7796-cpg-mssr.h2066log plain -rw-r--r--renesas-cpg-mssr.h542log plain -rw-r--r--rk1108-cru.h6605log plain -rw-r--r--rk3036-cru.h4584log plain -rw-r--r--rk3066a-cru.h1068log plain -rw-r--r--rk3188-cru-common.h6105log plain -rw-r--r--rk3188-cru.h1435log plain