/* * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __SOC_ARC_TIMERS_H #define __SOC_ARC_TIMERS_H #include /* Timer related Aux registers */ #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */ #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */ #define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */ #define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */ #define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */ #define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */ /* CTRL reg bits */ #define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */ #define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */ #define ARC_TIMERN_MAX 0xFFFFFFFF #define ARC_REG_TIMERS_BCR 0x75 struct bcr_timer { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8; #else unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15; #endif }; #endif ption> net-next plumbingsTobias Klauser
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authorVenkat Reddy Talla <vreddytalla@nvidia.com>2016-11-17 23:24:36 +0530
committerMark Brown <broonie@kernel.org>2016-11-23 16:27:42 +0000
commit983779235a4d08f94e8cda073200423e0ff01d2e (patch)
tree254b624bd499c14b09d55abaf209ea95f3c860f7 /include/dt-bindings/dma
parent383d0fca7035a12f1201277d33e8fc87c9d60c9a (diff)
regulator: max77620: add documentation for MPOK property
Adding documentation for maxim,power-ok-control dts property Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/dt-bindings/dma')