/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #ifndef __SOC_TEGRA_BPMP_H #define __SOC_TEGRA_BPMP_H #include #include #include #include #include struct tegra_bpmp_clk; struct tegra_bpmp_soc { struct { struct { unsigned int offset; unsigned int count; unsigned int timeout; } cpu_tx, thread, cpu_rx; } channels; unsigned int num_resets; }; struct tegra_bpmp_mb_data { u32 code; u32 flags; u8 data[MSG_DATA_MIN_SZ]; } __packed; struct tegra_bpmp_channel { struct tegra_bpmp *bpmp; struct tegra_bpmp_mb_data *ib; struct tegra_bpmp_mb_data *ob; struct completion completion; struct tegra_ivc *ivc; }; typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq, struct tegra_bpmp_channel *channel, void *data); struct tegra_bpmp_mrq { struct list_head list; unsigned int mrq; tegra_bpmp_mrq_handler_t handler; void *data; }; struct tegra_bpmp { const struct tegra_bpmp_soc *soc; struct device *dev; struct { struct gen_pool *pool; dma_addr_t phys; void *virt; } tx, rx; struct { struct mbox_client client; struct mbox_chan *channel; } mbox; struct tegra_bpmp_channel *channels; unsigned int num_channels; struct { unsigned long *allocated; unsigned long *busy; unsigned int count; struct semaphore lock; } threaded; struct list_head mrqs; spinlock_t lock; struct tegra_bpmp_clk **clocks; unsigned int num_clocks; struct reset_controller_dev rstc; }; struct tegra_bpmp *tegra_bpmp_get(struct device *dev); void tegra_bpmp_put(struct tegra_bpmp *bpmp); struct tegra_bpmp_message { unsigned int mrq; struct { const void *data; size_t size; } tx; struct { void *data; size_t size; } rx; }; int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp, struct tegra_bpmp_message *msg); int tegra_bpmp_transfer(struct tegra_bpmp *bpmp, struct tegra_bpmp_message *msg); int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, tegra_bpmp_mrq_handler_t handler, void *data); void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, void *data); #if IS_ENABLED(CONFIG_CLK_TEGRA_BPMP) int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp); #else static inline int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp) { return 0; } #endif #if IS_ENABLED(CONFIG_RESET_TEGRA_BPMP) int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp); #else static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp) { return 0; } #endif #endif /* __SOC_TEGRA_BPMP_H */ et-next.git/commit/Documentation?id=b5cd891716a9ef118ce8d3a367b6b0fa912447fc'>Documentation/devicetree/bindings/interrupt-controller
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authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-24 21:30:19 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-24 21:30:19 -0700
commitb5cd891716a9ef118ce8d3a367b6b0fa912447fc (patch)
tree026a2f00b2876c43cc8287b7ffadf1e4061dc200 /Documentation/devicetree/bindings/interrupt-controller
parent1ce5bdb8312b6e9629029340063ea1e5cfac435d (diff)
parent91bbc174d45c347aa7aedb2215cc7d2013c06c1f (diff)
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd: "This is the first batch of clk driver fixes for this release. We have a handful of fixes for the uniphier clk driver that was introduced recently, as well as Kconfig option hiding, module autoloading markings, and a few fixes for clk_hw based registration patches that went in this merge window" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: at91: Fix a return value in case of error clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs clk: uniphier: fix memory overrun bug clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock init clk: mvebu: armada-37xx-periph: Fix the clock gate flag clk: bcm2835: Clamp the PLL's requested rate to the hardware limits. clk: max77686: fix number of clocks setup for clk_hw based registration clk: mvebu: armada-37xx-periph: Fix the clock provider registration clk: core: add __init decoration for CLK_OF_DECLARE_DRIVER function clk: mediatek: Add hardware dependency clk: samsung: clk-exynos-audss: Fix module autoload clk: uniphier: fix type of variable passed to regmap_read() clk: uniphier: add system clock support for sLD3 SoC
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')