/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #ifndef __SOC_TEGRA_BPMP_H #define __SOC_TEGRA_BPMP_H #include #include #include #include #include struct tegra_bpmp_clk; struct tegra_bpmp_soc { struct { struct { unsigned int offset; unsigned int count; unsigned int timeout; } cpu_tx, thread, cpu_rx; } channels; unsigned int num_resets; }; struct tegra_bpmp_mb_data { u32 code; u32 flags; u8 data[MSG_DATA_MIN_SZ]; } __packed; struct tegra_bpmp_channel { struct tegra_bpmp *bpmp; struct tegra_bpmp_mb_data *ib; struct tegra_bpmp_mb_data *ob; struct completion completion; struct tegra_ivc *ivc; }; typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq, struct tegra_bpmp_channel *channel, void *data); struct tegra_bpmp_mrq { struct list_head list; unsigned int mrq; tegra_bpmp_mrq_handler_t handler; void *data; }; struct tegra_bpmp { const struct tegra_bpmp_soc *soc; struct device *dev; struct { struct gen_pool *pool; dma_addr_t phys; void *virt; } tx, rx; struct { struct mbox_client client; struct mbox_chan *channel; } mbox; struct tegra_bpmp_channel *channels; unsigned int num_channels; struct { unsigned long *allocated; unsigned long *busy; unsigned int count; struct semaphore lock; } threaded; struct list_head mrqs; spinlock_t lock; struct tegra_bpmp_clk **clocks; unsigned int num_clocks; struct reset_controller_dev rstc; }; struct tegra_bpmp *tegra_bpmp_get(struct device *dev); void tegra_bpmp_put(struct tegra_bpmp *bpmp); struct tegra_bpmp_message { unsigned int mrq; struct { const void *data; size_t size; } tx; struct { void *data; size_t size; } rx; }; int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp, struct tegra_bpmp_message *msg); int tegra_bpmp_transfer(struct tegra_bpmp *bpmp, struct tegra_bpmp_message *msg); int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, tegra_bpmp_mrq_handler_t handler, void *data); void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq, void *data); #if IS_ENABLED(CONFIG_CLK_TEGRA_BPMP) int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp); #else static inline int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp) { return 0; } #endif #if IS_ENABLED(CONFIG_RESET_TEGRA_BPMP) int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp); #else static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp) { return 0; } #endif #endif /* __SOC_TEGRA_BPMP_H */ lass='label'>context:space:mode:
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /net/llc
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/llc')