/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #ifndef __TEGRA_IVC_H #include #include #include struct tegra_ivc_header; struct tegra_ivc { struct device *peer; struct { struct tegra_ivc_header *channel; unsigned int position; dma_addr_t phys; } rx, tx; void (*notify)(struct tegra_ivc *ivc, void *data); void *notify_data; unsigned int num_frames; size_t frame_size; }; /** * tegra_ivc_read_get_next_frame - Peek at the next frame to receive * @ivc pointer of the IVC channel * * Peek at the next frame to be received, without removing it from * the queue. * * Returns a pointer to the frame, or an error encoded pointer. */ void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc); /** * tegra_ivc_read_advance - Advance the read queue * @ivc pointer of the IVC channel * * Advance the read queue * * Returns 0, or a negative error value if failed. */ int tegra_ivc_read_advance(struct tegra_ivc *ivc); /** * tegra_ivc_write_get_next_frame - Poke at the next frame to transmit * @ivc pointer of the IVC channel * * Get access to the next frame. * * Returns a pointer to the frame, or an error encoded pointer. */ void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc); /** * tegra_ivc_write_advance - Advance the write queue * @ivc pointer of the IVC channel * * Advance the write queue * * Returns 0, or a negative error value if failed. */ int tegra_ivc_write_advance(struct tegra_ivc *ivc); /** * tegra_ivc_notified - handle internal messages * @ivc pointer of the IVC channel * * This function must be called following every notification. * * Returns 0 if the channel is ready for communication, or -EAGAIN if a channel * reset is in progress. */ int tegra_ivc_notified(struct tegra_ivc *ivc); /** * tegra_ivc_reset - initiates a reset of the shared memory state * @ivc pointer of the IVC channel * * This function must be called after a channel is reserved before it is used * for communication. The channel will be ready for use when a subsequent call * to notify the remote of the channel reset. */ void tegra_ivc_reset(struct tegra_ivc *ivc); size_t tegra_ivc_align(size_t size); unsigned tegra_ivc_total_queue_size(unsigned queue_size); int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys, unsigned int num_frames, size_t frame_size, void (*notify)(struct tegra_ivc *ivc, void *data), void *data); void tegra_ivc_cleanup(struct tegra_ivc *ivc); #endif /* __TEGRA_IVC_H */ div class='cgit-panel'>diff options
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /net/tipc/netlink.c
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'net/tipc/netlink.c')