/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #ifndef __TEGRA_IVC_H #include #include #include struct tegra_ivc_header; struct tegra_ivc { struct device *peer; struct { struct tegra_ivc_header *channel; unsigned int position; dma_addr_t phys; } rx, tx; void (*notify)(struct tegra_ivc *ivc, void *data); void *notify_data; unsigned int num_frames; size_t frame_size; }; /** * tegra_ivc_read_get_next_frame - Peek at the next frame to receive * @ivc pointer of the IVC channel * * Peek at the next frame to be received, without removing it from * the queue. * * Returns a pointer to the frame, or an error encoded pointer. */ void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc); /** * tegra_ivc_read_advance - Advance the read queue * @ivc pointer of the IVC channel * * Advance the read queue * * Returns 0, or a negative error value if failed. */ int tegra_ivc_read_advance(struct tegra_ivc *ivc); /** * tegra_ivc_write_get_next_frame - Poke at the next frame to transmit * @ivc pointer of the IVC channel * * Get access to the next frame. * * Returns a pointer to the frame, or an error encoded pointer. */ void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc); /** * tegra_ivc_write_advance - Advance the write queue * @ivc pointer of the IVC channel * * Advance the write queue * * Returns 0, or a negative error value if failed. */ int tegra_ivc_write_advance(struct tegra_ivc *ivc); /** * tegra_ivc_notified - handle internal messages * @ivc pointer of the IVC channel * * This function must be called following every notification. * * Returns 0 if the channel is ready for communication, or -EAGAIN if a channel * reset is in progress. */ int tegra_ivc_notified(struct tegra_ivc *ivc); /** * tegra_ivc_reset - initiates a reset of the shared memory state * @ivc pointer of the IVC channel * * This function must be called after a channel is reserved before it is used * for communication. The channel will be ready for use when a subsequent call * to notify the remote of the channel reset. */ void tegra_ivc_reset(struct tegra_ivc *ivc); size_t tegra_ivc_align(size_t size); unsigned tegra_ivc_total_queue_size(unsigned queue_size); int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys, unsigned int num_frames, size_t frame_size, void (*notify)(struct tegra_ivc *ivc, void *data), void *data); void tegra_ivc_cleanup(struct tegra_ivc *ivc); #endif /* __TEGRA_IVC_H */ ude?h=nds-private-remove&id=50d55b6d3f1c40485e2e06b2805ef81f881ee9db'>include/trace/events/thermal.h
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authorHelge Deller <deller@gmx.de>2017-01-28 11:52:02 +0100
committerHelge Deller <deller@gmx.de>2017-01-28 21:54:23 +0100
commit2ad5d52d42810bed95100a3d912679d8864421ec (patch)
tree7f93e2f906b1c86f5b76c0f4c0978d41a8a29861 /include/uapi/rdma/mlx4-abi.h
parent83b5d1e3d3013dbf90645a5d07179d018c8243fa (diff)
parisc: Don't use BITS_PER_LONG in userspace-exported swab.h header
In swab.h the "#if BITS_PER_LONG > 32" breaks compiling userspace programs if BITS_PER_LONG is #defined by userspace with the sizeof() compiler builtin. Solve this problem by using __BITS_PER_LONG instead. Since we now #include asm/bitsperlong.h avoid further potential userspace pollution by moving the #define of SHIFT_PER_LONG to bitops.h which is not exported to userspace. This patch unbreaks compiling qemu on hppa/parisc. Signed-off-by: Helge Deller <deller@gmx.de> Cc: <stable@vger.kernel.org>
Diffstat (limited to 'include/uapi/rdma/mlx4-abi.h')