/* * Copyright (C) 2014 NVIDIA Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __SOC_TEGRA_MC_H__ #define __SOC_TEGRA_MC_H__ #include struct clk; struct device; struct page; struct tegra_smmu_enable { unsigned int reg; unsigned int bit; }; struct tegra_mc_timing { unsigned long rate; u32 *emem_data; }; /* latency allowance */ struct tegra_mc_la { unsigned int reg; unsigned int shift; unsigned int mask; unsigned int def; }; struct tegra_mc_client { unsigned int id; const char *name; unsigned int swgroup; unsigned int fifo_size; struct tegra_smmu_enable smmu; struct tegra_mc_la la; }; struct tegra_smmu_swgroup { const char *name; unsigned int swgroup; unsigned int reg; }; struct tegra_smmu_soc { const struct tegra_mc_client *clients; unsigned int num_clients; const struct tegra_smmu_swgroup *swgroups; unsigned int num_swgroups; bool supports_round_robin_arbitration; bool supports_request_limit; unsigned int num_tlb_lines; unsigned int num_asids; }; struct tegra_mc; struct tegra_smmu; #ifdef CONFIG_TEGRA_IOMMU_SMMU struct tegra_smmu *tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, struct tegra_mc *mc); void tegra_smmu_remove(struct tegra_smmu *smmu); #else static inline struct tegra_smmu * tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, struct tegra_mc *mc) { return NULL; } static inline void tegra_smmu_remove(struct tegra_smmu *smmu) { } #endif struct tegra_mc_soc { const struct tegra_mc_client *clients; unsigned int num_clients; const unsigned long *emem_regs; unsigned int num_emem_regs; unsigned int num_address_bits; unsigned int atom_size; u8 client_id_mask; const struct tegra_smmu_soc *smmu; }; struct tegra_mc { struct device *dev; struct tegra_smmu *smmu; void __iomem *regs; struct clk *clk; int irq; const struct tegra_mc_soc *soc; unsigned long tick; struct tegra_mc_timing *timings; unsigned int num_timings; }; void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); #endif /* __SOC_TEGRA_MC_H__ */ d='get' action='/cgit.cgi/linux/net-next.git/log/include/dt-bindings/mfd'>
path: root/include/dt-bindings/mfd
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /include/dt-bindings/mfd
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/dt-bindings/mfd')