#ifndef __SOUND_CS8403_H #define __SOUND_CS8403_H /* * Routines for Cirrus Logic CS8403/CS8404A IEC958 (S/PDIF) Transmitter * Copyright (c) by Jaroslav Kysela , * Takashi Iwai * * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ #ifdef SND_CS8403 #ifndef SND_CS8403_DECL #define SND_CS8403_DECL static #endif #ifndef SND_CS8403_DECODE #define SND_CS8403_DECODE snd_cs8403_decode_spdif_bits #endif #ifndef SND_CS8403_ENCODE #define SND_CS8403_ENCODE snd_cs8403_encode_spdif_bits #endif SND_CS8403_DECL void SND_CS8403_DECODE(struct snd_aes_iec958 *diga, unsigned char bits) { if (bits & 0x01) { /* consumer */ if (!(bits & 0x02)) diga->status[0] |= IEC958_AES0_NONAUDIO; if (!(bits & 0x08)) diga->status[0] |= IEC958_AES0_CON_NOT_COPYRIGHT; switch (bits & 0x10) { case 0x10: diga->status[0] |= IEC958_AES0_CON_EMPHASIS_NONE; break; case 0x00: diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; break; } if (!(bits & 0x80)) diga->status[1] |= IEC958_AES1_CON_ORIGINAL; switch (bits & 0x60) { case 0x00: diga->status[1] |= IEC958_AES1_CON_MAGNETIC_ID; break; case 0x20: diga->status[1] |= IEC958_AES1_CON_DIGDIGCONV_ID; break; case 0x40: diga->status[1] |= IEC958_AES1_CON_LASEROPT_ID; break; case 0x60: diga->status[1] |= IEC958_AES1_CON_GENERAL; break; } switch (bits & 0x06) { case 0x00: diga->status[3] |= IEC958_AES3_CON_FS_44100; break; case 0x02: diga->status[3] |= IEC958_AES3_CON_FS_48000; break; case 0x04: diga->status[3] |= IEC958_AES3_CON_FS_32000; break; } } else { diga->status[0] = IEC958_AES0_PROFESSIONAL; switch (bits & 0x18) { case 0x00: diga->status[0] |= IEC958_AES0_PRO_FS_32000; break; case 0x10: diga->status[0] |= IEC958_AES0_PRO_FS_44100; break; case 0x08: diga->status[0] |= IEC958_AES0_PRO_FS_48000; break; case 0x18: diga->status[0] |= IEC958_AES0_PRO_FS_NOTID; break; } switch (bits & 0x60) { case 0x20: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NONE; break; case 0x40: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; break; case 0x00: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_CCITT; break; case 0x60: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NOTID; break; } if (bits & 0x80) diga->status[1] |= IEC958_AES1_PRO_MODE_STEREOPHONIC; } } SND_CS8403_DECL unsigned char SND_CS8403_ENCODE(struct snd_aes_iec958 *diga) { unsigned char bits; if (!(diga->status[0] & IEC958_AES0_PROFESSIONAL)) { bits = 0x01; /* consumer mode */ if (diga->status[0] & IEC958_AES0_NONAUDIO) bits &= ~0x02; else bits |= 0x02; if (diga->status[0] & IEC958_AES0_CON_NOT_COPYRIGHT) bits &= ~0x08; else bits |= 0x08; switch (diga->status[0] & IEC958_AES0_CON_EMPHASIS) { default: case IEC958_AES0_CON_EMPHASIS_NONE: bits |= 0x10; break; case IEC958_AES0_CON_EMPHASIS_5015: bits |= 0x00; break; } if (diga->status[1] & IEC958_AES1_CON_ORIGINAL) bits &= ~0x80; else bits |= 0x80; if ((diga->status[1] & IEC958_AES1_CON_CATEGORY) == IEC958_AES1_CON_GENERAL) bits |= 0x60; else { switch(diga->status[1] & IEC958_AES1_CON_MAGNETIC_MASK) { case IEC958_AES1_CON_MAGNETIC_ID: bits |= 0x00; break; case IEC958_AES1_CON_DIGDIGCONV_ID: bits |= 0x20; break; default: case IEC958_AES1_CON_LASEROPT_ID: bits |= 0x40; break; } } switch (diga->status[3] & IEC958_AES3_CON_FS) { default: case IEC958_AES3_CON_FS_44100: bits |= 0x00; break; case IEC958_AES3_CON_FS_48000: bits |= 0x02; break; case IEC958_AES3_CON_FS_32000: bits |= 0x04; break; } } else { bits = 0x00; /* professional mode */ if (diga->status[0] & IEC958_AES0_NONAUDIO) bits &= ~0x02; else bits |= 0x02; /* CHECKME: I'm not sure about the bit order in val here */ switch (diga->status[0] & IEC958_AES0_PRO_FS) { case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break; case IEC958_AES0_PRO_FS_44100: bits |= 0x10; break; /* 44.1kHz */ case IEC958_AES0_PRO_FS_48000: bits |= 0x08; break; /* 48kHz */ default: case IEC958_AES0_PRO_FS_NOTID: bits |= 0x18; break; } switch (diga->status[0] & IEC958_AES0_PRO_EMPHASIS) { case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x20; break; case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x40; break; case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break; default: case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x60; break; } switch (diga->status[1] & IEC958_AES1_PRO_MODE) { case IEC958_AES1_PRO_MODE_TWO: case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break; default: bits |= 0x80; break; } } return bits; } #endif /* SND_CS8403 */ #ifdef SND_CS8404 #ifndef SND_CS8404_DECL #define SND_CS8404_DECL static #endif #ifndef SND_CS8404_DECODE #define SND_CS8404_DECODE snd_cs8404_decode_spdif_bits #endif #ifndef SND_CS8404_ENCODE #define SND_CS8404_ENCODE snd_cs8404_encode_spdif_bits #endif SND_CS8404_DECL void SND_CS8404_DECODE(struct snd_aes_iec958 *diga, unsigned char bits) { if (bits & 0x10) { /* consumer */ if (!(bits & 0x20)) diga->status[0] |= IEC958_AES0_CON_NOT_COPYRIGHT; if (!(bits & 0x40)) diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; if (!(bits & 0x80)) diga->status[1] |= IEC958_AES1_CON_ORIGINAL; switch (bits & 0x03) { case 0x00: diga->status[1] |= IEC958_AES1_CON_DAT; break; case 0x03: diga->status[1] |= IEC958_AES1_CON_GENERAL; break; } switch (bits & 0x06) { case 0x02: diga->status[3] |= IEC958_AES3_CON_FS_32000; break; case 0x04: diga->status[3] |= IEC958_AES3_CON_FS_48000; break; case 0x06: diga->status[3] |= IEC958_AES3_CON_FS_44100; break; } } else { diga->status[0] = IEC958_AES0_PROFESSIONAL; if (!(bits & 0x04)) diga->status[0] |= IEC958_AES0_NONAUDIO; switch (bits & 0x60) { case 0x00: diga->status[0] |= IEC958_AES0_PRO_FS_32000; break; case 0x40: diga->status[0] |= IEC958_AES0_PRO_FS_44100; break; case 0x20: diga->status[0] |= IEC958_AES0_PRO_FS_48000; break; case 0x60: diga->status[0] |= IEC958_AES0_PRO_FS_NOTID; break; } switch (bits & 0x03) { case 0x02: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NONE; break; case 0x01: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; break; case 0x00: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_CCITT; break; case 0x03: diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_NOTID; break; } if (!(bits & 0x80)) diga->status[1] |= IEC958_AES1_PRO_MODE_STEREOPHONIC; } } SND_CS8404_DECL unsigned char SND_CS8404_ENCODE(struct snd_aes_iec958 *diga) { unsigned char bits; if (!(diga->status[0] & IEC958_AES0_PROFESSIONAL)) { bits = 0x10; /* consumer mode */ if (!(diga->status[0] & IEC958_AES0_CON_NOT_COPYRIGHT)) bits |= 0x20; if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == IEC958_AES0_CON_EMPHASIS_NONE) bits |= 0x40; if (!(diga->status[1] & IEC958_AES1_CON_ORIGINAL)) bits |= 0x80; if ((diga->status[1] & IEC958_AES1_CON_CATEGORY) == IEC958_AES1_CON_GENERAL) bits |= 0x03; switch (diga->status[3] & IEC958_AES3_CON_FS) { default: case IEC958_AES3_CON_FS_44100: bits |= 0x06; break; case IEC958_AES3_CON_FS_48000: bits |= 0x04; break; case IEC958_AES3_CON_FS_32000: bits |= 0x02; break; } } else { bits = 0x00; /* professional mode */ if (!(diga->status[0] & IEC958_AES0_NONAUDIO)) bits |= 0x04; switch (diga->status[0] & IEC958_AES0_PRO_FS) { case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break; case IEC958_AES0_PRO_FS_44100: bits |= 0x40; break; /* 44.1kHz */ case IEC958_AES0_PRO_FS_48000: bits |= 0x20; break; /* 48kHz */ default: case IEC958_AES0_PRO_FS_NOTID: bits |= 0x00; break; } switch (diga->status[0] & IEC958_AES0_PRO_EMPHASIS) { case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x02; break; case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x01; break; case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break; default: case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x03; break; } switch (diga->status[1] & IEC958_AES1_PRO_MODE) { case IEC958_AES1_PRO_MODE_TWO: case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break; default: bits |= 0x80; break; } } return bits; } #endif /* SND_CS8404 */ #endif /* __SOUND_CS8403_H */ '>plain -rw-r--r--bcm2835.h1962logplain -rw-r--r--berlin2.h1034logplain -rw-r--r--berlin2q.h695logplain -rw-r--r--clps711x-clock.h718logplain -rw-r--r--efm32-cmu.h1112logplain -rw-r--r--exynos-audss-clk.h597logplain -rw-r--r--exynos3250.h9083logplain -rw-r--r--exynos4.h8284logplain -rw-r--r--exynos4415.h9828logplain -rw-r--r--exynos5250.h4616logplain -rw-r--r--exynos5260-clk.h14876logplain -rw-r--r--exynos5410.h1689logplain -rw-r--r--exynos5420.h6857logplain -rw-r--r--exynos5433.h45372logplain -rw-r--r--exynos5440.h1141logplain -rw-r--r--exynos7-clk.h5281logplain -rw-r--r--gxbb-aoclkc.h2866logplain -rw-r--r--gxbb-clkc.h592logplain -rw-r--r--hi3516cv300-clock.h1668logplain -rw-r--r--hi3519-clock.h1328logplain -rw-r--r--hi3620-clock.h4496logplain -rw-r--r--hi6220-clock.h4508logplain -rw-r--r--hip04-clock.h1137logplain -rw-r--r--histb-clock.h2012logplain -rw-r--r--hix5hd2-clock.h2415logplain -rw-r--r--imx1-clock.h1055logplain -rw-r--r--imx21-clock.h2461logplain -rw-r--r--imx27-clock.h3494logplain -rw-r--r--imx5-clock.h7212logplain -rw-r--r--imx6qdl-clock.h9593logplain -rw-r--r--imx6sl-clock.h5849logplain -rw-r--r--imx6sx-clock.h9099logplain -rw-r--r--imx6ul-clock.h8203logplain -rw-r--r--imx7d-clock.h15974logplain -rw-r--r--jz4740-cgu.h1028logplain -rw-r--r--jz4780-cgu.h2470logplain -rw-r--r--lpc18xx-ccu.h2134logplain -rw-r--r--lpc18xx-cgu.h1142logplain -rw-r--r--lpc32xx-clock.h1633logplain -rw-r--r--lsi,axm5516-clks.h974logplain -rw-r--r--marvell,mmp2.h2022logplain -rw-r--r--marvell,pxa168.h1654logplain -rw-r--r--marvell,pxa1928.h1535logplain -rw-r--r--marvell,pxa910.h1598logplain -rw-r--r--maxim,max77620.h632logplain -rw-r--r--maxim,max77686.h648logplain -rw-r--r--maxim,max77802.h630logplain -rw-r--r--meson8b-clkc.h523logplain -rw-r--r--microchip,pic32-clock.h1150logplain -rw-r--r--mpc512x-clock.h2236logplain -rw-r--r--mt2701-clk.h13832logplain -rw-r--r--mt8135-clk.h5641logplain -rw-r--r--mt8173-clk.h9293logplain -rw-r--r--oxsemi,ox810se.h1002logplain -rw-r--r--oxsemi,ox820.h1203logplain -rw-r--r--pistachio-clk.h4863logplain -rw-r--r--pxa-clock.h1715logplain -rw-r--r--qcom,gcc-apq8084.h12872logplain -rw-r--r--qcom,gcc-ipq4019.h5423logplain -rw-r--r--qcom,gcc-ipq806x.h8574logplain -rw-r--r--qcom,gcc-mdm9615.h9497logplain -rw-r--r--qcom,gcc-msm8660.h7932logplain -rw-r--r--qcom,gcc-msm8916.h6190logplain -rw-r--r--qcom,gcc-msm8960.h9342logplain -rw-r--r--qcom,gcc-msm8974.h12340logplain -rw-r--r--qcom,gcc-msm8994.h4858logplain -rw-r--r--qcom,gcc-msm8996.h12575logplain -rw-r--r--qcom,lcc-ipq806x.h899logplain -rw-r--r--qcom,lcc-mdm9615.h1701logplain -rw-r--r--qcom,lcc-msm8960.h1616logplain -rw-r--r--qcom,mmcc-apq8084.h5722logplain -rw-r--r--qcom,mmcc-msm8960.h4109logplain -rw-r--r--qcom,mmcc-msm8974.h5223logplain -rw-r--r--qcom,mmcc-msm8996.h9403logplain -rw-r--r--qcom,rpmcc.h2101logplain -rw-r--r--r7s72100-clock.h1218logplain -rw-r--r--r8a73a4-clock.h1596logplain -rw-r--r--r8a7740-clock.h1992logplain -rw-r--r--r8a7743-cpg-mssr.h1269logplain -rw-r--r--r8a7745-cpg-mssr.h1298logplain -rw-r--r--r8a7778-clock.h1855logplain -rw-r--r--r8a7779-clock.h1647logplain -rw-r--r--r8a7790-clock.h4367logplain -rw-r--r--r8a7791-clock.h4388logplain -rw-r--r--r8a7792-clock.h2562logplain -rw-r--r--r8a7793-clock.h4561logplain -rw-r--r--r8a7794-clock.h3679logplain -rw-r--r--r8a7795-cpg-mssr.h1890logplain -rw-r--r--r8a7796-cpg-mssr.h2066logplain -rw-r--r--renesas-cpg-mssr.h542logplain -rw-r--r--rk1108-cru.h6605logplain -rw-r--r--rk3036-cru.h4584logplain -rw-r--r--rk3066a-cru.h1068logplain -rw-r--r--rk3188-cru-common.h6105logplain -rw-r--r--rk3188-cru.h1435logplain