/* * linux/sound/wm2200.h -- Platform data for WM2200 * * Copyright 2012 Wolfson Microelectronics. PLC. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __LINUX_SND_WM2200_H #define __LINUX_SND_WM2200_H #define WM2200_GPIO_SET 0x10000 #define WM2200_MAX_MICBIAS 2 enum wm2200_in_mode { WM2200_IN_SE = 0, WM2200_IN_DIFF = 1, WM2200_IN_DMIC = 2, }; enum wm2200_dmic_sup { WM2200_DMIC_SUP_MICVDD = 0, WM2200_DMIC_SUP_MICBIAS1 = 1, WM2200_DMIC_SUP_MICBIAS2 = 2, }; enum wm2200_mbias_lvl { WM2200_MBIAS_LVL_1V5 = 1, WM2200_MBIAS_LVL_1V8 = 2, WM2200_MBIAS_LVL_1V9 = 3, WM2200_MBIAS_LVL_2V0 = 4, WM2200_MBIAS_LVL_2V2 = 5, WM2200_MBIAS_LVL_2V4 = 6, WM2200_MBIAS_LVL_2V5 = 7, WM2200_MBIAS_LVL_2V6 = 8, }; struct wm2200_micbias { enum wm2200_mbias_lvl mb_lvl; /** Regulated voltage */ unsigned int discharge:1; /** Actively discharge */ unsigned int fast_start:1; /** Enable aggressive startup ramp rate */ unsigned int bypass:1; /** Use bypass mode */ }; struct wm2200_pdata { int reset; /** GPIO controlling /RESET, if any */ int ldo_ena; /** GPIO controlling LODENA, if any */ int irq_flags; int gpio_defaults[4]; enum wm2200_in_mode in_mode[3]; enum wm2200_dmic_sup dmic_sup[3]; /** MICBIAS configurations */ struct wm2200_micbias micbias[WM2200_MAX_MICBIAS]; }; #endif ble class='tabs'> summaryrefslogtreecommitdiff
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authorAlan Brady <alan.brady@intel.com>2016-11-28 16:06:03 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2017-02-02 22:43:09 -0800
commit33084060fb6d51ff566439a387f69ed90301280c (patch)
treefdf257c069543dae105b4f9645dc62dc13016a90
parent1c0e6a3613d3f0bb088a3160095c8da4c1214d02 (diff)
i40e: add interrupt rate limit verbosity
Due to the resolution of the register controlling interrupt rate limiting, setting certain values for the interrupt rate limit make it appear as though the limiting is not completely accurate. The problem is that the interrupt rate limit is getting rounded down to the nearest multiple of 4. This patch fixes the problem by adding some feedback to the user as to the actual interrupt rate limit being used when it differs from the requested limit. Without this patch setting interrupt rate limits may appear to behave inaccurately. Change-ID: I3093cf3f2d437d35a4c4f4bb5af5ce1b85ab21b7 Signed-off-by: Alan Brady <alan.brady@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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