/*
 * asm-generic/int-ll64.h
 *
 * Integer declarations for architectures which use "long long"
 * for 64-bit types.
 */

#ifndef _UAPI_ASM_GENERIC_INT_LL64_H
#define _UAPI_ASM_GENERIC_INT_LL64_H

#include <asm/bitsperlong.h>

#ifndef __ASSEMBLY__
/*
 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
 * header files exported to user space
 */

typedef __signed__ char __s8;
typedef unsigned char __u8;

typedef __signed__ short __s16;
typedef unsigned short __u16;

typedef __signed__ int __s32;
typedef unsigned int __u32;

#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#else
typedef __signed__ long long __s64;
typedef unsigned long long __u64;
#endif

#endif /* __ASSEMBLY__ */


#endif /* _UAPI_ASM_GENERIC_INT_LL64_H */
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<tr><th>author</th><td>Ruslan Ruslichenko &lt;rruslich@cisco.com&gt;</td><td class='right'>2017-01-17 16:13:52 +0200</td></tr>
<tr><th>committer</th><td>Thomas Gleixner &lt;tglx@linutronix.de&gt;</td><td class='right'>2017-01-18 15:37:28 +0100</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/crypto/sha1_base.h?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de'>020eb3daaba2857b32c4cf4c82f503d6a00a67de</a> (<a href='/cgit.cgi/linux/net-next.git/patch/include/crypto/sha1_base.h?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de'>329a05b424d783db675a4c711bd7633575e8181b</a> /<a href='/cgit.cgi/linux/net-next.git/tree/include/crypto/sha1_base.h?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de'>include/crypto/sha1_base.h</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/crypto/sha1_base.h?id=49def1853334396f948dcb4cedb9347abb318df5'>49def1853334396f948dcb4cedb9347abb318df5</a> (<a href='/cgit.cgi/linux/net-next.git/diff/include/crypto/sha1_base.h?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de&amp;id2=49def1853334396f948dcb4cedb9347abb318df5'>diff</a>)</td></tr></table>
<div class='commit-subject'>x86/ioapic: Restore IO-APIC irq_chip retrigger callback</div><div class='commit-msg'>commit d32932d02e18 removed the irq_retrigger callback from the IO-APIC
chip and did not add it to the new IO-APIC-IR irq chip.

Unfortunately the software resend fallback is not enabled on X86, so edge
interrupts which are received during the lazy disabled state of the
interrupt line are not retriggered and therefor lost.

Restore the callbacks.

[ tglx: Massaged changelog ]

Fixes: d32932d02e18  ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces")
Signed-off-by: Ruslan Ruslichenko &lt;rruslich@cisco.com&gt;
Cc: xe-linux-external@cisco.com
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1484662432-13580-1-git-send-email-rruslich@cisco.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?id=020eb3daaba2857b32c4cf4c82f503d6a00a67de'>Diffstat</a> (limited to 'include/crypto/sha1_base.h')</div><table summary='diffstat' class='diffstat'>