/* * Copyright 2014 IBM Corp. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #ifndef _UAPI_MISC_CXL_H #define _UAPI_MISC_CXL_H #include #include struct cxl_ioctl_start_work { __u64 flags; __u64 work_element_descriptor; __u64 amr; __s16 num_interrupts; __s16 reserved1; __s32 reserved2; __u64 reserved3; __u64 reserved4; __u64 reserved5; __u64 reserved6; }; #define CXL_START_WORK_AMR 0x0000000000000001ULL #define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL #define CXL_START_WORK_ERR_FF 0x0000000000000004ULL #define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\ CXL_START_WORK_NUM_IRQS |\ CXL_START_WORK_ERR_FF) /* Possible modes that an afu can be in */ #define CXL_MODE_DEDICATED 0x1 #define CXL_MODE_DIRECTED 0x2 /* possible flags for the cxl_afu_id flags field */ #define CXL_AFUID_FLAG_SLAVE 0x1 /* In directed-mode afu is in slave mode */ struct cxl_afu_id { __u64 flags; /* One of CXL_AFUID_FLAG_X */ __u32 card_id; __u32 afu_offset; __u32 afu_mode; /* one of the CXL_MODE_X */ __u32 reserved1; __u64 reserved2; __u64 reserved3; __u64 reserved4; __u64 reserved5; __u64 reserved6; }; /* base adapter image header is included in the image */ #define CXL_AI_NEED_HEADER 0x0000000000000001ULL #define CXL_AI_ALL CXL_AI_NEED_HEADER #define CXL_AI_HEADER_SIZE 128 #define CXL_AI_BUFFER_SIZE 4096 #define CXL_AI_MAX_ENTRIES 256 #define CXL_AI_MAX_CHUNK_SIZE (CXL_AI_BUFFER_SIZE * CXL_AI_MAX_ENTRIES) struct cxl_adapter_image { __u64 flags; __u64 data; __u64 len_data; __u64 len_image; __u64 reserved1; __u64 reserved2; __u64 reserved3; __u64 reserved4; }; /* ioctl numbers */ #define CXL_MAGIC 0xCA /* AFU devices */ #define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work) #define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32) #define CXL_IOCTL_GET_AFU_ID _IOR(CXL_MAGIC, 0x02, struct cxl_afu_id) /* adapter devices */ #define CXL_IOCTL_DOWNLOAD_IMAGE _IOW(CXL_MAGIC, 0x0A, struct cxl_adapter_image) #define CXL_IOCTL_VALIDATE_IMAGE _IOW(CXL_MAGIC, 0x0B, struct cxl_adapter_image) #define CXL_READ_MIN_SIZE 0x1000 /* 4K */ /* Events from read() */ enum cxl_event_type { CXL_EVENT_RESERVED = 0, CXL_EVENT_AFU_INTERRUPT = 1, CXL_EVENT_DATA_STORAGE = 2, CXL_EVENT_AFU_ERROR = 3, CXL_EVENT_AFU_DRIVER = 4, }; struct cxl_event_header { __u16 type; __u16 size; __u16 process_element; __u16 reserved1; }; struct cxl_event_afu_interrupt { __u16 flags; __u16 irq; /* Raised AFU interrupt number */ __u32 reserved1; }; struct cxl_event_data_storage { __u16 flags; __u16 reserved1; __u32 reserved2; __u64 addr; __u64 dsisr; __u64 reserved3; }; struct cxl_event_afu_error { __u16 flags; __u16 reserved1; __u32 reserved2; __u64 error; }; struct cxl_event_afu_driver_reserved { /* * Defines the buffer passed to the cxl driver by the AFU driver. * * This is not ABI since the event header.size passed to the user for * existing events is set in the read call to sizeof(cxl_event_header) * + sizeof(whatever event is being dispatched) and the user is already * required to use a 4K buffer on the read call. * * Of course the contents will be ABI, but that's up the AFU driver. */ __u32 data_size; __u8 data[]; }; struct cxl_event { struct cxl_event_header header; union { struct cxl_event_afu_interrupt irq; struct cxl_event_data_storage fault; struct cxl_event_afu_error afu_error; struct cxl_event_afu_driver_reserved afu_driver_event; }; }; #endif /* _UAPI_MISC_CXL_H */ 5078937355c0d662ecef54b7d4d04f48da4fa9'>alphascale,asm9260.h2695log plain -rw-r--r--at91.h751log plain -rw-r--r--ath79-clk.h479log plain -rw-r--r--axis,artpec6-clkctrl.h1112log plain -rw-r--r--bcm-cygnus.h3135log plain -rw-r--r--bcm-ns2.h2915log plain -rw-r--r--bcm-nsp.h2148log plain -rw-r--r--bcm21664.h1984log plain -rw-r--r--bcm281xx.h2456log plain -rw-r--r--bcm2835-aux.h635log plain -rw-r--r--bcm2835.h1962log plain -rw-r--r--berlin2.h1034log plain -rw-r--r--berlin2q.h695log plain -rw-r--r--clps711x-clock.h718log plain -rw-r--r--efm32-cmu.h1112log plain -rw-r--r--exynos-audss-clk.h597log plain -rw-r--r--exynos3250.h9083log plain -rw-r--r--exynos4.h8284log plain -rw-r--r--exynos4415.h9828log plain -rw-r--r--exynos5250.h4616log plain -rw-r--r--exynos5260-clk.h14876log plain -rw-r--r--exynos5410.h1689log plain -rw-r--r--exynos5420.h6857log plain -rw-r--r--exynos5433.h45372log plain -rw-r--r--exynos5440.h1141log plain -rw-r--r--exynos7-clk.h5281log plain -rw-r--r--gxbb-aoclkc.h2866log plain -rw-r--r--gxbb-clkc.h592log plain -rw-r--r--hi3516cv300-clock.h1668log plain -rw-r--r--hi3519-clock.h1328log plain -rw-r--r--hi3620-clock.h4496log plain -rw-r--r--hi6220-clock.h4508log plain -rw-r--r--hip04-clock.h1137log plain -rw-r--r--histb-clock.h2012log plain -rw-r--r--hix5hd2-clock.h2415log plain -rw-r--r--imx1-clock.h1055log plain -rw-r--r--imx21-clock.h2461log plain -rw-r--r--imx27-clock.h3494log plain -rw-r--r--imx5-clock.h7212log plain -rw-r--r--imx6qdl-clock.h9593log plain -rw-r--r--imx6sl-clock.h5849log plain -rw-r--r--imx6sx-clock.h9099log plain -rw-r--r--imx6ul-clock.h8203log plain -rw-r--r--imx7d-clock.h15974log plain -rw-r--r--jz4740-cgu.h1028log plain -rw-r--r--jz4780-cgu.h2470log plain -rw-r--r--lpc18xx-ccu.h2134log plain -rw-r--r--lpc18xx-cgu.h1142log plain -rw-r--r--lpc32xx-clock.h1633log plain -rw-r--r--lsi,axm5516-clks.h974log plain -rw-r--r--marvell,mmp2.h2022log plain -rw-r--r--marvell,pxa168.h1654log plain -rw-r--r--marvell,pxa1928.h1535log plain -rw-r--r--marvell,pxa910.h1598log plain -rw-r--r--maxim,max77620.h632log plain -rw-r--r--maxim,max77686.h648log plain -rw-r--r--maxim,max77802.h630log plain -rw-r--r--meson8b-clkc.h523log plain -rw-r--r--microchip,pic32-clock.h1150log plain -rw-r--r--mpc512x-clock.h2236log plain -rw-r--r--mt2701-clk.h13832log plain -rw-r--r--mt8135-clk.h5641log plain -rw-r--r--mt8173-clk.h9293log plain -rw-r--r--oxsemi,ox810se.h1002log plain -rw-r--r--oxsemi,ox820.h1203log plain -rw-r--r--pistachio-clk.h4863log plain -rw-r--r--pxa-clock.h1715log plain -rw-r--r--qcom,gcc-apq8084.h12872log plain -rw-r--r--qcom,gcc-ipq4019.h5423log plain -rw-r--r--qcom,gcc-ipq806x.h8574log plain -rw-r--r--qcom,gcc-mdm9615.h9497log plain -rw-r--r--qcom,gcc-msm8660.h7932log plain -rw-r--r--qcom,gcc-msm8916.h6190log plain -rw-r--r--qcom,gcc-msm8960.h9342log plain -rw-r--r--qcom,gcc-msm8974.h12340log plain -rw-r--r--qcom,gcc-msm8994.h4858log plain -rw-r--r--qcom,gcc-msm8996.h12575log plain -rw-r--r--qcom,lcc-ipq806x.h899log plain -rw-r--r--qcom,lcc-mdm9615.h1701log plain -rw-r--r--qcom,lcc-msm8960.h1616log plain -rw-r--r--qcom,mmcc-apq8084.h5722log plain -rw-r--r--qcom,mmcc-msm8960.h4109log plain -rw-r--r--qcom,mmcc-msm8974.h5223log plain -rw-r--r--qcom,mmcc-msm8996.h9403log plain -rw-r--r--qcom,rpmcc.h2101log plain -rw-r--r--r7s72100-clock.h1218log plain -rw-r--r--r8a73a4-clock.h1596log plain -rw-r--r--r8a7740-clock.h1992log plain -rw-r--r--r8a7743-cpg-mssr.h1269log plain -rw-r--r--r8a7745-cpg-mssr.h1298log plain -rw-r--r--r8a7778-clock.h1855log plain -rw-r--r--r8a7779-clock.h1647log plain -rw-r--r--r8a7790-clock.h4367log plain -rw-r--r--r8a7791-clock.h4388log plain -rw-r--r--r8a7792-clock.h2562log plain -rw-r--r--r8a7793-clock.h4561log plain -rw-r--r--r8a7794-clock.h3679log plain -rw-r--r--r8a7795-cpg-mssr.h1890log plain -rw-r--r--r8a7796-cpg-mssr.h2066log plain -rw-r--r--renesas-cpg-mssr.h542log plain -rw-r--r--rk1108-cru.h6605log plain -rw-r--r--rk3036-cru.h4584log plain -rw-r--r--rk3066a-cru.h1068log plain -rw-r--r--rk3188-cru-common.h6105log plain -rw-r--r--rk3188-cru.h1435log plain