/* * Copyright © 1999-2010 David Woodhouse * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ #ifndef __MTD_NFTL_USER_H__ #define __MTD_NFTL_USER_H__ #include /* Block Control Information */ struct nftl_bci { unsigned char ECCSig[6]; __u8 Status; __u8 Status1; }__attribute__((packed)); /* Unit Control Information */ struct nftl_uci0 { __u16 VirtUnitNum; __u16 ReplUnitNum; __u16 SpareVirtUnitNum; __u16 SpareReplUnitNum; } __attribute__((packed)); struct nftl_uci1 { __u32 WearInfo; __u16 EraseMark; __u16 EraseMark1; } __attribute__((packed)); struct nftl_uci2 { __u16 FoldMark; __u16 FoldMark1; __u32 unused; } __attribute__((packed)); union nftl_uci { struct nftl_uci0 a; struct nftl_uci1 b; struct nftl_uci2 c; }; struct nftl_oob { struct nftl_bci b; union nftl_uci u; }; /* NFTL Media Header */ struct NFTLMediaHeader { char DataOrgID[6]; __u16 NumEraseUnits; __u16 FirstPhysicalEUN; __u32 FormattedSize; unsigned char UnitSizeFactor; } __attribute__((packed)); #define MAX_ERASE_ZONES (8192 - 512) #define ERASE_MARK 0x3c69 #define SECTOR_FREE 0xff #define SECTOR_USED 0x55 #define SECTOR_IGNORE 0x11 #define SECTOR_DELETED 0x00 #define FOLD_MARK_IN_PROGRESS 0x5555 #define ZONE_GOOD 0xff #define ZONE_BAD_ORIGINAL 0 #define ZONE_BAD_MARKED 7 #endif /* __MTD_NFTL_USER_H__ */ xt.git/diff/include/net/geneve.h?id=030305d69fc6963c16003f50d7e8d74b02d0a143'>diff
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authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /include/net/geneve.h
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'include/net/geneve.h')