/* QLogic qedr NIC Driver * Copyright (c) 2015-2016 QLogic Corporation * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and /or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __QEDR_USER_H__ #define __QEDR_USER_H__ #include #define QEDR_ABI_VERSION (8) /* user kernel communication data structures. */ struct qedr_alloc_ucontext_resp { __u64 db_pa; __u32 db_size; __u32 max_send_wr; __u32 max_recv_wr; __u32 max_srq_wr; __u32 sges_per_send_wr; __u32 sges_per_recv_wr; __u32 sges_per_srq_wr; __u32 max_cqes; }; struct qedr_alloc_pd_ureq { __u64 rsvd1; }; struct qedr_alloc_pd_uresp { __u32 pd_id; }; struct qedr_create_cq_ureq { __u64 addr; __u64 len; }; struct qedr_create_cq_uresp { __u32 db_offset; __u16 icid; }; struct qedr_create_qp_ureq { __u32 qp_handle_hi; __u32 qp_handle_lo; /* SQ */ /* user space virtual address of SQ buffer */ __u64 sq_addr; /* length of SQ buffer */ __u64 sq_len; /* RQ */ /* user space virtual address of RQ buffer */ __u64 rq_addr; /* length of RQ buffer */ __u64 rq_len; }; struct qedr_create_qp_uresp { __u32 qp_id; __u32 atomic_supported; /* SQ */ __u32 sq_db_offset; __u16 sq_icid; /* RQ */ __u32 rq_db_offset; __u16 rq_icid; __u32 rq_db2_offset; }; #endif /* __QEDR_USER_H__ */ me='q' value=''/>
path: root/include/drm/drm_encoder.h
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authorDaniel Vetter <daniel.vetter@ffwll.ch>2017-01-12 17:15:56 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-01-30 10:17:32 +0100
commite6e7b48b295afa5a5ab440de0a94d9ad8b3ce2d0 (patch)
tree77cadb6d8aad1b52c34e4afa8c9deef603bbe2ed /include/drm/drm_encoder.h
parent4e5b54f127426c82dc2816340c26d951a5bb3429 (diff)
drm: Don't race connector registration
I was under the misconception that the sysfs dev stuff can be fully set up, and then registered all in one step with device_add. That's true for properties and property groups, but not for parents and child devices. Those must be fully registered before you can register a child. Add a bit of tracking to make sure that asynchronous mst connector hotplugging gets this right. For consistency we rely upon the implicit barriers of the connector->mutex, which is taken anyway, to ensure that at least either the connector or device registration call will work out. Mildly tested since I can't reliably reproduce this on my mst box here. Reported-by: Dave Hansen <dave.hansen@intel.com> Cc: Dave Hansen <dave.hansen@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484237756-2720-1-git-send-email-daniel.vetter@ffwll.ch
Diffstat (limited to 'include/drm/drm_encoder.h')