/* * Header file for TI DA8XX LCD controller platform data. * * Copyright (C) 2008-2009 MontaVista Software Inc. * Copyright (C) 2008-2009 Texas Instruments Inc * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef DA8XX_FB_H #define DA8XX_FB_H enum panel_shade { MONOCHROME = 0, COLOR_ACTIVE, COLOR_PASSIVE, }; enum raster_load_mode { LOAD_DATA = 1, LOAD_PALETTE, }; enum da8xx_frame_complete { DA8XX_FRAME_WAIT, DA8XX_FRAME_NOWAIT, }; struct da8xx_lcdc_platform_data { const char manu_name[10]; void *controller_data; const char type[25]; void (*panel_power_ctrl)(int); }; struct lcd_ctrl_config { enum panel_shade panel_shade; /* AC Bias Pin Frequency */ int ac_bias; /* AC Bias Pin Transitions per Interrupt */ int ac_bias_intrpt; /* DMA burst size */ int dma_burst_sz; /* Bits per pixel */ int bpp; /* FIFO DMA Request Delay */ int fdd; /* TFT Alternative Signal Mapping (Only for active) */ unsigned char tft_alt_mode; /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */ unsigned char stn_565_mode; /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */ unsigned char mono_8bit_mode; /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */ unsigned char sync_edge; /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */ unsigned char raster_order; /* DMA FIFO threshold */ int fifo_th; }; struct lcd_sync_arg { int back_porch; int front_porch; int pulse_width; }; /* ioctls */ #define FBIOGET_CONTRAST _IOR('F', 1, int) #define FBIOPUT_CONTRAST _IOW('F', 2, int) #define FBIGET_BRIGHTNESS _IOR('F', 3, int) #define FBIPUT_BRIGHTNESS _IOW('F', 3, int) #define FBIGET_COLOR _IOR('F', 5, int) #define FBIPUT_COLOR _IOW('F', 6, int) #define FBIPUT_HSYNC _IOW('F', 9, int) #define FBIPUT_VSYNC _IOW('F', 10, int) /* Proprietary FB_SYNC_ flags */ #define FB_SYNC_CLK_INVERT 0x40000000 #endif /* ifndef DA8XX_FB_H */ d1b9daf3cc7046902f'>commitdiff
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authorFlorian Westphal <fw@strlen.de>2017-01-23 18:21:59 +0100
committerPablo Neira Ayuso <pablo@netfilter.org>2017-02-02 14:31:56 +0100
commita9e419dc7be6997409dca6d1b9daf3cc7046902f (patch)
treeff33b9a6415926bc627d1ad6e49eece8ef417b43
parent303223092081963513494b4377fa1ac9e362ed4b (diff)
netfilter: merge ctinfo into nfct pointer storage area
After this change conntrack operations (lookup, creation, matching from ruleset) only access one instead of two sk_buff cache lines. This works for normal conntracks because those are allocated from a slab that guarantees hw cacheline or 8byte alignment (whatever is larger) so the 3 bits needed for ctinfo won't overlap with nf_conn addresses. Template allocation now does manual address alignment (see previous change) on arches that don't have sufficent kmalloc min alignment. Some spots intentionally use skb->_nfct instead of skb_nfct() helpers, this is to avoid undoing the skb_nfct() use when we remove untracked conntrack object in the future. Signed-off-by: Florian Westphal <fw@strlen.de> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Diffstat
-rw-r--r--include/linux/skbuff.h21
-rw-r--r--include/net/netfilter/nf_conntrack.h11
-rw-r--r--net/ipv6/netfilter/nf_dup_ipv6.c2
-rw-r--r--net/netfilter/core.c2
-rw-r--r--net/netfilter/nf_conntrack_core.c11
-rw-r--r--net/netfilter/nf_conntrack_standalone.c3
-rw-r--r--net/netfilter/xt_CT.c4
7 files changed, 28 insertions, 26 deletions
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h