#include #include #include #include static unsigned dir_class[] = { #include ~0U }; static unsigned read_class[] = { #include ~0U }; static unsigned write_class[] = { #include ~0U }; static unsigned chattr_class[] = { #include ~0U }; static unsigned signal_class[] = { #include ~0U }; int audit_classify_arch(int arch) { if (audit_is_compat(arch)) return 1; else return 0; } int audit_classify_syscall(int abi, unsigned syscall) { if (audit_is_compat(abi)) return audit_classify_compat_syscall(abi, syscall); switch(syscall) { #ifdef __NR_open case __NR_open: return 2; #endif #ifdef __NR_openat case __NR_openat: return 3; #endif #ifdef __NR_socketcall case __NR_socketcall: return 4; #endif #ifdef __NR_execveat case __NR_execveat: #endif case __NR_execve: return 5; default: return 0; } } static int __init audit_classes_init(void) { #ifdef CONFIG_AUDIT_COMPAT_GENERIC audit_register_class(AUDIT_CLASS_WRITE_32, compat_write_class); audit_register_class(AUDIT_CLASS_READ_32, compat_read_class); audit_register_class(AUDIT_CLASS_DIR_WRITE_32, compat_dir_class); audit_register_class(AUDIT_CLASS_CHATTR_32, compat_chattr_class); audit_register_class(AUDIT_CLASS_SIGNAL_32, compat_signal_class); #endif audit_register_class(AUDIT_CLASS_WRITE, write_class); audit_register_class(AUDIT_CLASS_READ, read_class); audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class); audit_register_class(AUDIT_CLASS_CHATTR, chattr_class); audit_register_class(AUDIT_CLASS_SIGNAL, signal_class); return 0; } __initcall(audit_classes_init); '/cgit.cgi/linux/net-next.git/tree/include/crypto/engine.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>treecommitdiff
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /include/crypto/engine.h
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/crypto/engine.h')