/* saved per-CPU IRQ register pointer * * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include #include #include #ifndef ARCH_HAS_OWN_IRQ_REGS DEFINE_PER_CPU(struct pt_regs *, __irq_regs); EXPORT_PER_CPU_SYMBOL(__irq_regs); #endif ry'/>
summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorAndre Przywara <andre.przywara@arm.com>2016-11-01 18:00:08 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2016-11-04 17:56:54 +0000
commit112b0b8f8f6e18d4695d21457961c0e1b322a1d7 (patch)
tree0145a35a2e65e9cbc713ec2d56dd04c3b9ea6216 /include
parent94d0e5980d6791b9f98a9b6c586c1f7cb76b2178 (diff)
KVM: arm/arm64: vgic: Prevent access to invalid SPIs
In our VGIC implementation we limit the number of SPIs to a number that the userland application told us. Accordingly we limit the allocation of memory for virtual IRQs to that number. However in our MMIO dispatcher we didn't check if we ever access an IRQ beyond that limit, leading to out-of-bound accesses. Add a test against the number of allocated SPIs in check_region(). Adjust the VGIC_ADDR_TO_INT macro to avoid an actual division, which is not implemented on ARM(32). [maz: cleaned-up original patch] Cc: stable@vger.kernel.org Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include')