config XZ_DEC tristate "XZ decompression support" select CRC32 help LZMA2 compression algorithm and BCJ filters are supported using the .xz file format as the container. For integrity checking, CRC32 is supported. See Documentation/xz.txt for more information. if XZ_DEC config XZ_DEC_X86 bool "x86 BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ config XZ_DEC_POWERPC bool "PowerPC BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ config XZ_DEC_IA64 bool "IA-64 BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ config XZ_DEC_ARM bool "ARM BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ config XZ_DEC_ARMTHUMB bool "ARM-Thumb BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ config XZ_DEC_SPARC bool "SPARC BCJ filter decoder" if EXPERT default y select XZ_DEC_BCJ endif config XZ_DEC_BCJ bool default n config XZ_DEC_TEST tristate "XZ decompressor tester" default n depends on XZ_DEC help This allows passing .xz files to the in-kernel XZ decoder via a character special file. It calculates CRC32 of the decompressed data and writes diagnostics to the system log. Unless you are developing the XZ decoder, you don't need this and should say N. ivate-remove net-next plumbingsTobias Klauser
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /include/uapi/asm-generic/shmparam.h
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/uapi/asm-generic/shmparam.h')