/* * Lec arp cache * * Marko Kiiskila */ #ifndef _LEC_ARP_H_ #define _LEC_ARP_H_ #include #include #include #include struct lec_arp_table { struct hlist_node next; /* Linked entry list */ unsigned char atm_addr[ATM_ESA_LEN]; /* Atm address */ unsigned char mac_addr[ETH_ALEN]; /* Mac address */ int is_rdesc; /* Mac address is a route descriptor */ struct atm_vcc *vcc; /* Vcc this entry is attached */ struct atm_vcc *recv_vcc; /* Vcc we receive data from */ void (*old_push) (struct atm_vcc *vcc, struct sk_buff *skb); /* Push that leads to daemon */ void (*old_recv_push) (struct atm_vcc *vcc, struct sk_buff *skb); /* Push that leads to daemon */ unsigned long last_used; /* For expiry */ unsigned long timestamp; /* Used for various timestamping things: * 1. FLUSH started * (status=ESI_FLUSH_PENDING) * 2. Counting to * max_unknown_frame_time * (status=ESI_ARP_PENDING|| * status=ESI_VC_PENDING) */ unsigned char no_tries; /* No of times arp retry has been tried */ unsigned char status; /* Status of this entry */ unsigned short flags; /* Flags for this entry */ unsigned short packets_flooded; /* Data packets flooded */ unsigned long flush_tran_id; /* Transaction id in flush protocol */ struct timer_list timer; /* Arping timer */ struct lec_priv *priv; /* Pointer back */ u8 *tlvs; u32 sizeoftlvs; /* * LANE2: Each MAC address can have TLVs * associated with it. sizeoftlvs tells the * the length of the tlvs array */ struct sk_buff_head tx_wait; /* wait queue for outgoing packets */ atomic_t usage; /* usage count */ }; /* * LANE2: Template tlv struct for accessing * the tlvs in the lec_arp_table->tlvs array */ struct tlv { u32 type; u8 length; u8 value[255]; }; /* Status fields */ #define ESI_UNKNOWN 0 /* * Next packet sent to this mac address * causes ARP-request to be sent */ #define ESI_ARP_PENDING 1 /* * There is no ATM address associated with this * 48-bit address. The LE-ARP protocol is in * progress. */ #define ESI_VC_PENDING 2 /* * There is a valid ATM address associated with * this 48-bit address but there is no VC set * up to that ATM address. The signaling * protocol is in process. */ #define ESI_FLUSH_PENDING 4 /* * The LEC has been notified of the FLUSH_START * status and it is assumed that the flush * protocol is in process. */ #define ESI_FORWARD_DIRECT 5 /* * Either the Path Switching Delay (C22) has * elapsed or the LEC has notified the Mapping * that the flush protocol has completed. In * either case, it is safe to forward packets * to this address via the data direct VC. */ /* Flag values */ #define LEC_REMOTE_FLAG 0x0001 #define LEC_PERMANENT_FLAG 0x0002 #endif /* _LEC_ARP_H_ */ net-next.git/commit/net/ipv6/fou6.c?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>fou6.c
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /net/ipv6/fou6.c
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'net/ipv6/fou6.c')