/* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * Copyright (C) Jonathan Naylor G4KLX (g4klx@g4klx.demon.co.uk) */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include ax25_dev *ax25_dev_list; DEFINE_SPINLOCK(ax25_dev_lock); ax25_dev *ax25_addr_ax25dev(ax25_address *addr) { ax25_dev *ax25_dev, *res = NULL; spin_lock_bh(&ax25_dev_lock); for (ax25_dev = ax25_dev_list; ax25_dev != NULL; ax25_dev = ax25_dev->next) if (ax25cmp(addr, (ax25_address *)ax25_dev->dev->dev_addr) == 0) { res = ax25_dev; } spin_unlock_bh(&ax25_dev_lock); return res; } /* * This is called when an interface is brought up. These are * reasonable defaults. */ void ax25_dev_device_up(struct net_device *dev) { ax25_dev *ax25_dev; if ((ax25_dev = kzalloc(sizeof(*ax25_dev), GFP_ATOMIC)) == NULL) { printk(KERN_ERR "AX.25: ax25_dev_device_up - out of memory\n"); return; } dev->ax25_ptr = ax25_dev; ax25_dev->dev = dev; dev_hold(dev); ax25_dev->forward = NULL; ax25_dev->values[AX25_VALUES_IPDEFMODE] = AX25_DEF_IPDEFMODE; ax25_dev->values[AX25_VALUES_AXDEFMODE] = AX25_DEF_AXDEFMODE; ax25_dev->values[AX25_VALUES_BACKOFF] = AX25_DEF_BACKOFF; ax25_dev->values[AX25_VALUES_CONMODE] = AX25_DEF_CONMODE; ax25_dev->values[AX25_VALUES_WINDOW] = AX25_DEF_WINDOW; ax25_dev->values[AX25_VALUES_EWINDOW] = AX25_DEF_EWINDOW; ax25_dev->values[AX25_VALUES_T1] = AX25_DEF_T1; ax25_dev->values[AX25_VALUES_T2] = AX25_DEF_T2; ax25_dev->values[AX25_VALUES_T3] = AX25_DEF_T3; ax25_dev->values[AX25_VALUES_IDLE] = AX25_DEF_IDLE; ax25_dev->values[AX25_VALUES_N2] = AX25_DEF_N2; ax25_dev->values[AX25_VALUES_PACLEN] = AX25_DEF_PACLEN; ax25_dev->values[AX25_VALUES_PROTOCOL] = AX25_DEF_PROTOCOL; ax25_dev->values[AX25_VALUES_DS_TIMEOUT]= AX25_DEF_DS_TIMEOUT; #if defined(CONFIG_AX25_DAMA_SLAVE) || defined(CONFIG_AX25_DAMA_MASTER) ax25_ds_setup_timer(ax25_dev); #endif spin_lock_bh(&ax25_dev_lock); ax25_dev->next = ax25_dev_list; ax25_dev_list = ax25_dev; spin_unlock_bh(&ax25_dev_lock); ax25_register_dev_sysctl(ax25_dev); } void ax25_dev_device_down(struct net_device *dev) { ax25_dev *s, *ax25_dev; if ((ax25_dev = ax25_dev_ax25dev(dev)) == NULL) return; ax25_unregister_dev_sysctl(ax25_dev); spin_lock_bh(&ax25_dev_lock); #ifdef CONFIG_AX25_DAMA_SLAVE ax25_ds_del_timer(ax25_dev); #endif /* * Remove any packet forwarding that points to this device. */ for (s = ax25_dev_list; s != NULL; s = s->next) if (s->forward == dev) s->forward = NULL; if ((s = ax25_dev_list) == ax25_dev) { ax25_dev_list = s->next; spin_unlock_bh(&ax25_dev_lock); dev_put(dev); kfree(ax25_dev); return; } while (s != NULL && s->next != NULL) { if (s->next == ax25_dev) { s->next = ax25_dev->next; spin_unlock_bh(&ax25_dev_lock); dev_put(dev); kfree(ax25_dev); return; } s = s->next; } spin_unlock_bh(&ax25_dev_lock); dev->ax25_ptr = NULL; } int ax25_fwd_ioctl(unsigned int cmd, struct ax25_fwd_struct *fwd) { ax25_dev *ax25_dev, *fwd_dev; if ((ax25_dev = ax25_addr_ax25dev(&fwd->port_from)) == NULL) return -EINVAL; switch (cmd) { case SIOCAX25ADDFWD: if ((fwd_dev = ax25_addr_ax25dev(&fwd->port_to)) == NULL) return -EINVAL; if (ax25_dev->forward != NULL) return -EINVAL; ax25_dev->forward = fwd_dev->dev; break; case SIOCAX25DELFWD: if (ax25_dev->forward == NULL) return -EINVAL; ax25_dev->forward = NULL; break; default: return -EINVAL; } return 0; } struct net_device *ax25_fwd_dev(struct net_device *dev) { ax25_dev *ax25_dev; if ((ax25_dev = ax25_dev_ax25dev(dev)) == NULL) return dev; if (ax25_dev->forward == NULL) return dev; return ax25_dev->forward; } /* * Free all memory associated with device structures. */ void __exit ax25_dev_free(void) { ax25_dev *s, *ax25_dev; spin_lock_bh(&ax25_dev_lock); ax25_dev = ax25_dev_list; while (ax25_dev != NULL) { s = ax25_dev; dev_put(ax25_dev->dev); ax25_dev = ax25_dev->next; kfree(s); } ax25_dev_list = NULL; spin_unlock_bh(&ax25_dev_lock); } net-next.git/patch/Documentation?id=4217ff3509f95e12d98729a202ae068709226ad5'>patch) tree31223517cf21ef6b15b86a65804bbc8b4e2ddcae /Documentation parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)parent10f22ee367c4aff7841da6a83c10445d7d6328d9 (diff)
Merge branch 'for-v4.7/gpmc-mtd-common' of github.com:rogerq/linux into nand/next
Pull NAND/GPMC updates from Roger Quadros: "We do a couple of things in this series which result in cleaner device tree implementation, faster perfomance and multi-platform support. As an added bonus we get to use the GPMC_WAIT pins as GPI/Interrupts. - Establish a custom interface between NAND and GPMC driver. This is needed because all of the NAND registers sit in the GPMC register space. - Clean up device tree support so that omap-gpmc IP and the omap2 NAND driver can be used on non-OMAP platforms. e.g. Keystone. - Implement GPIOCHIP for the GPMC WAITPINS. SoCs can contain 2 to 4 of these and most of them would be unused otherwise. It also allows a cleaner implementation of NAND Ready pin status for the NAND driver. - Implement GPMC IRQ domain to proivde the 2 NAND events and GPMC WAITPIN edge interrupts. - Implement GPIOlib based NAND ready pin checking for OMAP NAND driver. On dra7-evm, Read speed increases from 13768 KiB/ to 17246 KiB/s. Write speed was unchanged at 7123 KiB/s." * 'for-v4.7/gpmc-mtd-common' of github.com:rogerq/linux: mtd: nand: omap2: Implement NAND ready using gpiolib memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs memory: omap-gpmc: Support WAIT pin edge interrupts memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring memory: omap-gpmc: Support general purpose input for WAITPINs memory: omap-gpmc: Move device tree binding to correct location memory: omap-gpmc: Prevent mapping into 1st 16MB mtd: nand: omap: Update DT binding documentation mtd: nand: omap: Clean up device tree support mtd: nand: omap: Copy platform data parameters to omap_nand_info data mtd: nand: omap: Switch to using GPMC-NAND ops for writebuffer empty check mtd: nand: omap: Use gpmc_omap_get_nand_ops() to get NAND registers memory: omap-gpmc: Implement IRQ domain for NAND IRQs memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status memory: omap-gpmc: Introduce GPMC to NAND interface ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data ARM: OMAP2+: gpmc: Add platform data
Diffstat (limited to 'Documentation')