/* * Copyright 2015, Qualcomm Atheros, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef AES_GMAC_H #define AES_GMAC_H #include #define GMAC_AAD_LEN 20 #define GMAC_MIC_LEN 16 #define GMAC_NONCE_LEN 12 struct crypto_aead *ieee80211_aes_gmac_key_setup(const u8 key[], size_t key_len); int ieee80211_aes_gmac(struct crypto_aead *tfm, const u8 *aad, u8 *nonce, const u8 *data, size_t data_len, u8 *mic); void ieee80211_aes_gmac_key_free(struct crypto_aead *tfm); #endif /* AES_GMAC_H */ /cgit.png' alt='cgit logo'/> index : net-next.git
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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /net/rose
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/rose')