/// Find nested lock+irqsave functions that use the same flags variables /// // Confidence: High // Copyright: (C) 2010-2012 Nicolas Palix. GPLv2. // Copyright: (C) 2010-2012 Julia Lawall, INRIA/LIP6. GPLv2. // Copyright: (C) 2010-2012 Gilles Muller, INRIA/LiP6. GPLv2. // URL: http://coccinelle.lip6.fr/ // Comments: // Options: --no-includes --include-headers virtual context virtual org virtual report @r exists@ expression lock1,lock2,flags; position p1,p2; @@ ( spin_lock_irqsave@p1(lock1,flags) | read_lock_irqsave@p1(lock1,flags) | write_lock_irqsave@p1(lock1,flags) ) ... when != flags ( spin_lock_irqsave(lock1,flags) | read_lock_irqsave(lock1,flags) | write_lock_irqsave(lock1,flags) | spin_lock_irqsave@p2(lock2,flags) | read_lock_irqsave@p2(lock2,flags) | write_lock_irqsave@p2(lock2,flags) ) @d exists@ expression f <= r.flags; expression lock1,lock2,flags; position r.p1, r.p2; @@ ( *spin_lock_irqsave@p1(lock1,flags) | *read_lock_irqsave@p1(lock1,flags) | *write_lock_irqsave@p1(lock1,flags) ) ... when != f ( *spin_lock_irqsave@p2(lock2,flags) | *read_lock_irqsave@p2(lock2,flags) | *write_lock_irqsave@p2(lock2,flags) ) // ---------------------------------------------------------------------- @script:python depends on d && org@ p1 << r.p1; p2 << r.p2; @@ cocci.print_main("original lock",p1) cocci.print_secs("nested lock+irqsave that reuses flags",p2) @script:python depends on d && report@ p1 << r.p1; p2 << r.p2; @@ msg="ERROR: nested lock+irqsave that reuses flags from line %s." % (p1[0].line) coccilib.report.print_report(p2[0], msg) cgi/linux/net-next.git/refs/?id=1a0bee6c1e788218fd1d141db320db970aace7f0'>refslogtreecommitdiff
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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /include/scsi/scsi_dh.h
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/scsi/scsi_dh.h')