/// Check for constants that are added but are used elsewhere as bitmasks /// The results should be checked manually to ensure that the nonzero /// bits in the two constants are actually disjoint. /// // Confidence: Moderate // Copyright: (C) 2013 Julia Lawall, INRIA/LIP6. GPLv2. // Copyright: (C) 2013 Gilles Muller, INRIA/LIP6. GPLv2. // URL: http://coccinelle.lip6.fr/ // Comments: // Options: --no-includes --include-headers virtual org virtual report virtual context @r@ constant c; identifier i; expression e; @@ ( e | c@i | e & c@i | e |= c@i | e &= c@i ) @s@ constant r.c,c1; identifier i1; position p; @@ ( c1 + c - 1 | *c1@i1 +@p c ) @script:python depends on org@ p << s.p; @@ cocci.print_main("sum of probable bitmasks, consider |",p) @script:python depends on report@ p << s.p; @@ msg = "WARNING: sum of probable bitmasks, consider |" coccilib.report.print_report(p[0],msg) et'> net-next plumbingsTobias Klauser
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authorJiri Slaby <jslaby@suse.cz>2017-01-18 14:29:21 +0100
committerIngo Molnar <mingo@kernel.org>2017-01-19 08:39:44 +0100
commitb5b46c4740aed1538544f0fa849c5b76c7823469 (patch)
tree125e7aced4835bad6f6a0c0d02d012f333caf922 /include/uapi/asm-generic/Kbuild.asm
parentfa19a769f82fb9a5ca000b83cacd13fcaeda51ac (diff)
objtool: Fix IRET's opcode
The IRET opcode is 0xcf according to the Intel manual and also to objdump of my vmlinux: 1ea8: 48 cf iretq Fix the opcode in arch_decode_instruction(). The previous value (0xc5) seems to correspond to LDS. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Acked-by: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170118132921.19319-1-jslaby@suse.cz Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/uapi/asm-generic/Kbuild.asm')