/* * OPL4 mixer functions * Copyright (c) 2003 by Clemens Ladisch * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include "opl4_local.h" #include static int snd_opl4_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count = 2; uinfo->value.integer.min = 0; uinfo->value.integer.max = 7; return 0; } static int snd_opl4_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_opl4 *opl4 = snd_kcontrol_chip(kcontrol); unsigned long flags; u8 reg = kcontrol->private_value; u8 value; spin_lock_irqsave(&opl4->reg_lock, flags); value = snd_opl4_read(opl4, reg); spin_unlock_irqrestore(&opl4->reg_lock, flags); ucontrol->value.integer.value[0] = 7 - (value & 7); ucontrol->value.integer.value[1] = 7 - ((value >> 3) & 7); return 0; } static int snd_opl4_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct snd_opl4 *opl4 = snd_kcontrol_chip(kcontrol); unsigned long flags; u8 reg = kcontrol->private_value; u8 value, old_value; value = (7 - (ucontrol->value.integer.value[0] & 7)) | ((7 - (ucontrol->value.integer.value[1] & 7)) << 3); spin_lock_irqsave(&opl4->reg_lock, flags); old_value = snd_opl4_read(opl4, reg); snd_opl4_write(opl4, reg, value); spin_unlock_irqrestore(&opl4->reg_lock, flags); return value != old_value; } static struct snd_kcontrol_new snd_opl4_controls[] = { { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "FM Playback Volume", .info = snd_opl4_ctl_info, .get = snd_opl4_ctl_get, .put = snd_opl4_ctl_put, .private_value = OPL4_REG_MIX_CONTROL_FM }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Wavetable Playback Volume", .info = snd_opl4_ctl_info, .get = snd_opl4_ctl_get, .put = snd_opl4_ctl_put, .private_value = OPL4_REG_MIX_CONTROL_PCM } }; int snd_opl4_create_mixer(struct snd_opl4 *opl4) { struct snd_card *card = opl4->card; int i, err; strcat(card->mixername, ",OPL4"); for (i = 0; i < 2; ++i) { err = snd_ctl_add(card, snd_ctl_new1(&snd_opl4_controls[i], opl4)); if (err < 0) return err; } return 0; } efa1db9f6e71b24440b5f1d93e968ee3'>sound/soc/mediatek/mt8173
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /sound/soc/mediatek/mt8173
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'sound/soc/mediatek/mt8173')