/* * dice.h - a part of driver for Dice based devices * * Copyright (c) Clemens Ladisch * Copyright (c) 2014 Takashi Sakamoto * * Licensed under the terms of the GNU General Public License, version 2. */ #ifndef SOUND_DICE_H_INCLUDED #define SOUND_DICE_H_INCLUDED #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "../amdtp-am824.h" #include "../iso-resources.h" #include "../lib.h" #include "dice-interface.h" /* * This module support maximum 2 pairs of tx/rx isochronous streams for * our convinience. * * In documents for ASICs called with a name of 'DICE': * - ASIC for DICE II: * - Maximum 2 tx and 4 rx are supported. * - A packet supports maximum 16 data channels. * - TCD2210/2210-E (so-called 'Dice Mini'): * - Maximum 2 tx and 2 rx are supported. * - A packet supports maximum 16 data channels. * - TCD2220/2220-E (so-called 'Dice Jr.') * - 2 tx and 2 rx are supported. * - A packet supports maximum 16 data channels. * - TCD3070-CH (so-called 'Dice III') * - Maximum 2 tx and 2 rx are supported. * - A packet supports maximum 32 data channels. * * For the above, MIDI conformant data channel is just on the first isochronous * stream. */ #define MAX_STREAMS 2 struct snd_dice { struct snd_card *card; struct fw_unit *unit; spinlock_t lock; struct mutex mutex; bool registered; struct delayed_work dwork; /* Offsets for sub-addresses */ unsigned int global_offset; unsigned int rx_offset; unsigned int tx_offset; unsigned int sync_offset; unsigned int rsrv_offset; unsigned int clock_caps; struct fw_address_handler notification_handler; int owner_generation; u32 notification_bits; /* For uapi */ int dev_lock_count; /* > 0 driver, < 0 userspace */ bool dev_lock_changed; wait_queue_head_t hwdep_wait; /* For streaming */ struct fw_iso_resources tx_resources[MAX_STREAMS]; struct fw_iso_resources rx_resources[MAX_STREAMS]; struct amdtp_stream tx_stream[MAX_STREAMS]; struct amdtp_stream rx_stream[MAX_STREAMS]; bool global_enabled; struct completion clock_accepted; unsigned int substreams_counter; bool force_two_pcms; }; enum snd_dice_addr_type { SND_DICE_ADDR_TYPE_PRIVATE, SND_DICE_ADDR_TYPE_GLOBAL, SND_DICE_ADDR_TYPE_TX, SND_DICE_ADDR_TYPE_RX, SND_DICE_ADDR_TYPE_SYNC, SND_DICE_ADDR_TYPE_RSRV, }; int snd_dice_transaction_write(struct snd_dice *dice, enum snd_dice_addr_type type, unsigned int offset, void *buf, unsigned int len); int snd_dice_transaction_read(struct snd_dice *dice, enum snd_dice_addr_type type, unsigned int offset, void *buf, unsigned int len); static inline int snd_dice_transaction_write_global(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_GLOBAL, offset, buf, len); } static inline int snd_dice_transaction_read_global(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_GLOBAL, offset, buf, len); } static inline int snd_dice_transaction_write_tx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_TX, offset, buf, len); } static inline int snd_dice_transaction_read_tx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_TX, offset, buf, len); } static inline int snd_dice_transaction_write_rx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_RX, offset, buf, len); } static inline int snd_dice_transaction_read_rx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_RX, offset, buf, len); } static inline int snd_dice_transaction_write_sync(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_SYNC, offset, buf, len); } static inline int snd_dice_transaction_read_sync(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) { return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_SYNC, offset, buf, len); } int snd_dice_transaction_get_clock_source(struct snd_dice *dice, unsigned int *source); int snd_dice_transaction_get_rate(struct snd_dice *dice, unsigned int *rate); int snd_dice_transaction_set_enable(struct snd_dice *dice); void snd_dice_transaction_clear_enable(struct snd_dice *dice); int snd_dice_transaction_init(struct snd_dice *dice); int snd_dice_transaction_reinit(struct snd_dice *dice); void snd_dice_transaction_destroy(struct snd_dice *dice); #define SND_DICE_RATES_COUNT 7 extern const unsigned int snd_dice_rates[SND_DICE_RATES_COUNT]; int snd_dice_stream_start_duplex(struct snd_dice *dice, unsigned int rate); void snd_dice_stream_stop_duplex(struct snd_dice *dice); int snd_dice_stream_init_duplex(struct snd_dice *dice); void snd_dice_stream_destroy_duplex(struct snd_dice *dice); void snd_dice_stream_update_duplex(struct snd_dice *dice); int snd_dice_stream_lock_try(struct snd_dice *dice); void snd_dice_stream_lock_release(struct snd_dice *dice); int snd_dice_create_pcm(struct snd_dice *dice); int snd_dice_create_hwdep(struct snd_dice *dice); void snd_dice_create_proc(struct snd_dice *dice); int snd_dice_create_midi(struct snd_dice *dice); #endif b529c80b06861f9ac85'>38b8767462120c62a5046b529c80b06861f9ac85 (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main MIPS pull request for 4.9: MIPS core arch code: - traps: 64bit kernels should read CP0_EBase 64bit - traps: Convert ebase to KSEG0 - c-r4k: Drop bc_wback_inv() from icache flush - c-r4k: Split user/kernel flush_icache_range() - cacheflush: Use __flush_icache_user_range() - uprobes: Flush icache via kernel address - KVM: Use __local_flush_icache_user_range() - c-r4k: Fix flush_icache_range() for EVA - Fix -mabi=64 build of vdso.lds - VDSO: Drop duplicated -I*/-E* aflags - tracing: move insn_has_delay_slot to a shared header - tracing: disable uprobe/kprobe on compact branch instructions - ptrace: Fix regs_return_value for kernel context - Squash lines for simple wrapper functions - Move identification of VP(E) into proc.c from smp-mt.c - Add definitions of SYNC barrierstype values - traps: Ensure full EBase is written - tlb-r4k: If there are wired entries, don't use TLBINVF - Sanitise coherentio semantics - dma-default: Don't check hw_coherentio if device is non-coherent - Support per-device DMA coherence - Adjust MIPS64 CAC_BASE to reflect Config.K0 - Support generating Flattened Image Trees (.itb) - generic: Introduce generic DT-based board support - generic: Convert SEAD-3 to a generic board - Enable hardened usercopy - Don't specify STACKPROTECTOR in defconfigs Octeon: - Delete dead code and files across the platform. - Change to use all memory into use by default. - Rename upper case variables in setup code to lowercase. - Delete legacy hack for broken bootloaders. - Leave maintaining the link state to the actual ethernet/PHY drivers. - Add DTS for D-Link DSR-500N. - Fix PCI interrupt routing on D-Link DSR-500N. Pistachio: - Remove ANDROID_TIMED_OUTPUT from defconfig TX39xx: - Move GPIO setup from .mem_setup() to .arch_init() - Convert to Common Clock Framework TX49xx: - Move GPIO setup from .mem_setup() to .arch_init() - Convert to Common Clock Framework txx9wdt: - Add missing clock (un)prepare calls for CCF BMIPS: - Add PW, GPIO SDHCI and NAND device node names - Support APPENDED_DTB - Add missing bcm97435svmb to DT_NONE - Rename bcm96358nb4ser to bcm6358-neufbox4-sercom - Add DT examples for BCM63268, BCM3368 and BCM6362 - Add support for BCM3368 and BCM6362 PCI - Reduce stack frame usage - Use struct list_head lists - Support for CONFIG_PCI_DOMAINS_GENERIC - Make pcibios_set_cache_line_size an initcall - Inline pcibios_assign_all_busses - Split pci.c into pci.c & pci-legacy.c - Introduce CONFIG_PCI_DRIVERS_LEGACY - Support generic drivers CPC - Convert bare 'unsigned' to 'unsigned int' - Avoid lock when MIPS CM >= 3 is present GIC: - Delete unused file smp-gic.c mt7620: - Delete unnecessary assignment for the field "owner" from PCI BCM63xx: - Let clk_disable() return immediately if clk is NULL pm-cps: - Change FSB workaround to CPU blacklist - Update comments on barrier instructions - Use MIPS standard lightweight ordering barrier - Use MIPS standard completion barrier - Remove selection of sync types - Add MIPSr6 CPU support - Support CM3 changes to Coherence Enable Register SMP: - Wrap call to mips_cpc_lock_other in mips_cm_lock_other - Introduce mechanism for freeing and allocating IPIs cpuidle: - cpuidle-cps: Enable use with MIPSr6 CPUs. SEAD3: - Rewrite to use DT and generic kernel feature. USB: - host: ehci-sead3: Remove SEAD-3 EHCI code FBDEV: - cobalt_lcdfb: Drop SEAD3 support dt-bindings: - Document a binding for simple ASCII LCDs auxdisplay: - img-ascii-lcd: driver for simple ASCII LCD displays irqchip i8259: - i8259: Add domain before mapping parent irq - i8259: Allow platforms to override poll function - i8259: Remove unused i8259A_irq_pending Malta: - Rewrite to use DT of/platform: - Probe "isa" busses by default CM: - Print CM error reports upon bus errors Module: - Migrate exception table users off module.h and onto extable.h - Make various drivers explicitly non-modular: - Audit and remove any unnecessary uses of module.h mailmap: - Canonicalize to Qais' current email address. Documentation: - MIPS supports HAVE_REGS_AND_STACK_ACCESS_API Loongson1C: - Add CPU support for Loongson1C - Add board support - Add defconfig - Add RTC support for Loongson1C board All this except one Documentation fix has sat in linux-next and has survived Imagination's automated build test system" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (127 commits) Documentation: MIPS supports HAVE_REGS_AND_STACK_ACCESS_API MIPS: ptrace: Fix regs_return_value for kernel context MIPS: VDSO: Drop duplicated -I*/-E* aflags MIPS: Fix -mabi=64 build of vdso.lds MIPS: Enable hardened usercopy MIPS: generic: Convert SEAD-3 to a generic board MIPS: generic: Introduce generic DT-based board support MIPS: Support generating Flattened Image Trees (.itb) MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0 MIPS: Print CM error reports upon bus errors MIPS: Support per-device DMA coherence MIPS: dma-default: Don't check hw_coherentio if device is non-coherent MIPS: Sanitise coherentio semantics MIPS: PCI: Support generic drivers MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY MIPS: PCI: Split pci.c into pci.c & pci-legacy.c MIPS: PCI: Inline pcibios_assign_all_busses MIPS: PCI: Make pcibios_set_cache_line_size an initcall MIPS: PCI: Support for CONFIG_PCI_DOMAINS_GENERIC MIPS: PCI: Use struct list_head lists ...
Diffstat (limited to 'net/bridge')