/* * Copyright (C) 2012-2013, Analog Devices Inc. * Author: Lars-Peter Clausen * * Licensed under the GPL-2. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #define AXI_I2S_REG_RESET 0x00 #define AXI_I2S_REG_CTRL 0x04 #define AXI_I2S_REG_CLK_CTRL 0x08 #define AXI_I2S_REG_STATUS 0x10 #define AXI_I2S_REG_RX_FIFO 0x28 #define AXI_I2S_REG_TX_FIFO 0x2C #define AXI_I2S_RESET_GLOBAL BIT(0) #define AXI_I2S_RESET_TX_FIFO BIT(1) #define AXI_I2S_RESET_RX_FIFO BIT(2) #define AXI_I2S_CTRL_TX_EN BIT(0) #define AXI_I2S_CTRL_RX_EN BIT(1) /* The frame size is configurable, but for now we always set it 64 bit */ #define AXI_I2S_BITS_PER_FRAME 64 struct axi_i2s { struct regmap *regmap; struct clk *clk; struct clk *clk_ref; struct snd_soc_dai_driver dai_driver; struct snd_dmaengine_dai_dma_data capture_dma_data; struct snd_dmaengine_dai_dma_data playback_dma_data; struct snd_ratnum ratnum; struct snd_pcm_hw_constraint_ratnums rate_constraints; }; static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); unsigned int mask, val; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) mask = AXI_I2S_CTRL_RX_EN; else mask = AXI_I2S_CTRL_TX_EN; switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: val = mask; break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: val = 0; break; default: return -EINVAL; } regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); return 0; } static int axi_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); unsigned int bclk_div, word_size; unsigned int bclk_rate; bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME; word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1; bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | bclk_div); return 0; } static int axi_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); uint32_t mask; int ret; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) mask = AXI_I2S_RESET_RX_FIFO; else mask = AXI_I2S_RESET_TX_FIFO; regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask); ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &i2s->rate_constraints); if (ret) return ret; return clk_prepare_enable(i2s->clk_ref); } static void axi_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); clk_disable_unprepare(i2s->clk_ref); } static int axi_i2s_dai_probe(struct snd_soc_dai *dai) { struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, &i2s->capture_dma_data); return 0; } static const struct snd_soc_dai_ops axi_i2s_dai_ops = { .startup = axi_i2s_startup, .shutdown = axi_i2s_shutdown, .trigger = axi_i2s_trigger, .hw_params = axi_i2s_hw_params, }; static struct snd_soc_dai_driver axi_i2s_dai = { .probe = axi_i2s_dai_probe, .playback = { .channels_min = 2, .channels_max = 2, .rates = SNDRV_PCM_RATE_KNOT, .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE, }, .capture = { .channels_min = 2, .channels_max = 2, .rates = SNDRV_PCM_RATE_KNOT, .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE, }, .ops = &axi_i2s_dai_ops, .symmetric_rates = 1, }; static const struct snd_soc_component_driver axi_i2s_component = { .name = "axi-i2s", }; static const struct regmap_config axi_i2s_regmap_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, .max_register = AXI_I2S_REG_STATUS, }; static int axi_i2s_probe(struct platform_device *pdev) { struct resource *res; struct axi_i2s *i2s; void __iomem *base; int ret; i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); if (!i2s) return -ENOMEM; platform_set_drvdata(pdev, i2s); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(base)) return PTR_ERR(base); i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base, &axi_i2s_regmap_config); if (IS_ERR(i2s->regmap)) return PTR_ERR(i2s->regmap); i2s->clk = devm_clk_get(&pdev->dev, "axi"); if (IS_ERR(i2s->clk)) return PTR_ERR(i2s->clk); i2s->clk_ref = devm_clk_get(&pdev->dev, "ref"); if (IS_ERR(i2s->clk_ref)) return PTR_ERR(i2s->clk_ref); ret = clk_prepare_enable(i2s->clk); if (ret) return ret; i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO; i2s->playback_dma_data.addr_width = 4; i2s->playback_dma_data.maxburst = 1; i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO; i2s->capture_dma_data.addr_width = 4; i2s->capture_dma_data.maxburst = 1; i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME; i2s->ratnum.den_step = 1; i2s->ratnum.den_min = 1; i2s->ratnum.den_max = 64; i2s->rate_constraints.rats = &i2s->ratnum; i2s->rate_constraints.nrats = 1; regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL); ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component, &axi_i2s_dai, 1); if (ret) goto err_clk_disable; ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); if (ret) goto err_clk_disable; return 0; err_clk_disable: clk_disable_unprepare(i2s->clk); return ret; } static int axi_i2s_dev_remove(struct platform_device *pdev) { struct axi_i2s *i2s = platform_get_drvdata(pdev); clk_disable_unprepare(i2s->clk); return 0; } static const struct of_device_id axi_i2s_of_match[] = { { .compatible = "adi,axi-i2s-1.00.a", }, {}, }; MODULE_DEVICE_TABLE(of, axi_i2s_of_match); static struct platform_driver axi_i2s_driver = { .driver = { .name = "axi-i2s", .of_match_table = axi_i2s_of_match, }, .probe = axi_i2s_probe, .remove = axi_i2s_dev_remove, }; module_platform_driver(axi_i2s_driver); MODULE_AUTHOR("Lars-Peter Clausen "); MODULE_DESCRIPTION("AXI I2S driver"); MODULE_LICENSE("GPL"); de15ea3627913b7549a1e9'>auxtrace.c47774logplain -rw-r--r--auxtrace.h22142logplain -rw-r--r--block-range.c6948logplain -rw-r--r--block-range.h1607logplain -rw-r--r--bpf-loader.c40787logplain -rw-r--r--bpf-loader.h6215logplain -rw-r--r--bpf-prologue.c11226logplain -rw-r--r--bpf-prologue.h847logplain -rw-r--r--build-id.c19054logplain -rw-r--r--build-id.h1859logplain d---------c++184logplain -rw-r--r--cache.h733logplain -rw-r--r--call-path.c2893logplain -rw-r--r--call-path.h2203logplain -rw-r--r--callchain.c29332logplain -rw-r--r--callchain.h7881logplain -rw-r--r--cgroup.c3195logplain -rw-r--r--cgroup.h359logplain -rw-r--r--cloexec.c1950logplain -rw-r--r--cloexec.h251logplain -rw-r--r--color.c4787logplain -rw-r--r--color.h1647logplain -rw-r--r--comm.c2239logplain -rw-r--r--comm.h561logplain -rw-r--r--config.c16262logplain -rw-r--r--config.h2113logplain -rw-r--r--counts.c1026logplain -rw-r--r--counts.h790logplain -rw-r--r--cpumap.c12627logplain -rw-r--r--cpumap.h1954logplain -rw-r--r--cs-etm.h2061logplain -rw-r--r--ctype.c2018logplain -rw-r--r--data-convert-bt.c36671logplain -rw-r--r--data-convert-bt.h302logplain -rw-r--r--data-convert.h141logplain -rw-r--r--data.c3459logplain -rw-r--r--data.h1369logplain -rw-r--r--db-export.c11434logplain -rw-r--r--db-export.h3816logplain -rw-r--r--debug.c4417logplain -rw-r--r--debug.h2023logplain -rw-r--r--demangle-java.c4219logplain -rw-r--r--demangle-java.h249logplain -rw-r--r--demangle-rust.c6602logplain -rw-r--r--demangle-rust.h170logplain -rw-r--r--drv_configs.c1834logplain -rw-r--r--drv_configs.h844logplain -rw-r--r--dso.c31994logplain -rw-r--r--dso.h10399logplain -rw-r--r--dwarf-aux.c33828logplain -rw-r--r--dwarf-aux.h5101logplain -rw-r--r--dwarf-regs.c1816logplain -rw-r--r--env.c1884logplain -rw-r--r--env.h1268logplain -rw-r--r--event.c36670logplain -rw-r--r--event.h15997logplain -rw-r--r--evlist.c47104logplain -rw-r--r--evlist.h12584logplain -rw-r--r--evsel.c63917logplain -rw-r--r--evsel.h13041logplain -rw-r--r--evsel_fprintf.c5831logplain -rw-r--r--find-vdso-map.c581logplain -rw-r--r--genelf.c11653logplain -rw-r--r--genelf.h1814logplain -rw-r--r--genelf_debug.c14374logplain -rwxr-xr-xgenerate-cmdlist.sh1141logplain -rw-r--r--group.h122logplain -rw-r--r--header.c73410logplain -rw-r--r--header.h4365logplain -rw-r--r--help-unknown-cmd.c3221logplain