## ## Au1200/Au1550/Au1300 PSC + DBDMA ## config SND_SOC_AU1XPSC tristate "SoC Audio for Au12xx/Au13xx/Au1550" depends on MIPS_ALCHEMY help This option enables support for the Programmable Serial Controllers in AC97 and I2S mode, and the Descriptor-Based DMA Controller (DBDMA) as found on the Au12xx/Au13xx/Au1550 SoC. config SND_SOC_AU1XPSC_I2S tristate config SND_SOC_AU1XPSC_AC97 tristate select AC97_BUS select SND_AC97_CODEC select SND_SOC_AC97_BUS ## ## Au1000/1500/1100 DMA + AC97C/I2SC ## config SND_SOC_AU1XAUDIO tristate "SoC Audio for Au1000/Au1500/Au1100" depends on MIPS_ALCHEMY help This is a driver set for the AC97 unit and the old DMA controller as found on the Au1000/Au1500/Au1100 chips. config SND_SOC_AU1XAC97C tristate select AC97_BUS select SND_AC97_CODEC select SND_SOC_AC97_BUS config SND_SOC_AU1XI2SC tristate ## ## Boards ## config SND_SOC_DB1000 tristate "DB1000 Audio support" depends on SND_SOC_AU1XAUDIO select SND_SOC_AU1XAC97C select SND_SOC_AC97_CODEC help Select this option to enable AC97 audio on the early DB1x00 series of boards (DB1000/DB1500/DB1100). config SND_SOC_DB1200 tristate "DB1200/DB1300/DB1550 Audio support" depends on SND_SOC_AU1XPSC select SND_SOC_AU1XPSC_AC97 select SND_SOC_AC97_CODEC select SND_SOC_WM9712 select SND_SOC_AU1XPSC_I2S select SND_SOC_WM8731 help Select this option to enable audio (AC97 and I2S) on the Alchemy/AMD/RMI/NetLogic Db1200, Db1550 and Db1300 evaluation boards. If you need Db1300 touchscreen support, you definitely want to say Y. t/?h=nds-private-remove'>summaryrefslogtreecommitdiff
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authorThomas Gleixner <tglx@linutronix.de>2017-01-31 09:37:34 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-31 21:47:58 +0100
commit0becc0ae5b42828785b589f686725ff5bc3b9b25 (patch)
treebe6d0e1f37c38ed0a7dd5da2d4b1e93f0fb43101 /include/rdma/iw_cm.h
parent24c2503255d35c269b67162c397a1a1c1e02f6ce (diff)
x86/mce: Make timer handling more robust
Erik reported that on a preproduction hardware a CMCI storm triggers the BUG_ON in add_timer_on(). The reason is that the per CPU MCE timer is started by the CMCI logic before the MCE CPU hotplug callback starts the timer with add_timer_on(). So the timer is already queued which triggers the BUG. Using add_timer_on() is pretty pointless in this code because the timer is strictlty per CPU, initialized as pinned and all operations which arm the timer happen on the CPU to which the timer belongs. Simplify the whole machinery by using mod_timer() instead of add_timer_on() which avoids the problem because mod_timer() can handle already queued timers. Use __start_timer() everywhere so the earliest armed expiry time is preserved. Reported-by: Erik Veijola <erik.veijola@intel.com> Tested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701310936080.3457@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/rdma/iw_cm.h')