/* * rl6347a.h - RL6347A class device shared support * * Copyright 2015 Realtek Semiconductor Corp. * * Author: Oder Chiou * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __RL6347A_H__ #define __RL6347A_H__ #include #define VERB_CMD(V, N, D) ((N << 20) | (V << 8) | D) #define RL6347A_VENDOR_REGISTERS 0x20 #define RL6347A_COEF_INDEX\ VERB_CMD(AC_VERB_SET_COEF_INDEX, RL6347A_VENDOR_REGISTERS, 0) #define RL6347A_PROC_COEF\ VERB_CMD(AC_VERB_SET_PROC_COEF, RL6347A_VENDOR_REGISTERS, 0) struct rl6347a_priv { struct reg_default *index_cache; int index_cache_size; }; int rl6347a_hw_write(void *context, unsigned int reg, unsigned int value); int rl6347a_hw_read(void *context, unsigned int reg, unsigned int *value); #endif /* __RL6347A_H__ */ 5ecc4ba81b5970'/> net-next plumbingsTobias Klauser
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authorRussell King <rmk+kernel@armlinux.org.uk>2016-11-22 13:56:54 +0000
committerLiviu Dudau <Liviu.Dudau@arm.com>2016-11-22 14:09:06 +0000
commit7a79279e7186c4ac8b753cbd335ecc4ba81b5970 (patch)
tree07246483935eb187767dd61ad24b254ca4c459c1 /include/sound
parenta25f0944ba9b1d8a6813fd6f1a86f1bd59ac25a6 (diff)
drm/arm: hdlcd: fix plane base address update
While testing HDMI with Xorg on the Juno board, I find that when Xorg starts up or shuts down, the display is shifted significantly to the right and wrapped in the active region. (No sync bars are visible.) The timings are correct, it behaves as if the start address has been shifted many pixels _into_ the framebuffer. This occurs whenever the display mode size is changed - using xrandr in Xorg shows that changing the resolution triggers the problem almost every time, but changing the refresh rate does not. Using devmem2 to disable and re-enable the HDLCD resolves the issue, and repeated disable/enable cycles do not make the issue re-appear. Further debugging shows that we try to update the controller configuration while enabled. Alwys ensure that the HDLCD is disabled prior to updating the controller timings, and use drm_crtc_vblank_off()/drm_crtc_vblank_on() so that DRM knows whether it can expect vblank interrupts. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'include/sound')