/* * Copyright 2005 Openedhand Ltd. * * Author: Richard Purdie * * Based on WM8753.h * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ #ifndef _WM8988_H #define _WM8988_H /* WM8988 register space */ #define WM8988_LINVOL 0x00 #define WM8988_RINVOL 0x01 #define WM8988_LOUT1V 0x02 #define WM8988_ROUT1V 0x03 #define WM8988_ADCDAC 0x05 #define WM8988_IFACE 0x07 #define WM8988_SRATE 0x08 #define WM8988_LDAC 0x0a #define WM8988_RDAC 0x0b #define WM8988_BASS 0x0c #define WM8988_TREBLE 0x0d #define WM8988_RESET 0x0f #define WM8988_3D 0x10 #define WM8988_ALC1 0x11 #define WM8988_ALC2 0x12 #define WM8988_ALC3 0x13 #define WM8988_NGATE 0x14 #define WM8988_LADC 0x15 #define WM8988_RADC 0x16 #define WM8988_ADCTL1 0x17 #define WM8988_ADCTL2 0x18 #define WM8988_PWR1 0x19 #define WM8988_PWR2 0x1a #define WM8988_ADCTL3 0x1b #define WM8988_ADCIN 0x1f #define WM8988_LADCIN 0x20 #define WM8988_RADCIN 0x21 #define WM8988_LOUTM1 0x22 #define WM8988_LOUTM2 0x23 #define WM8988_ROUTM1 0x24 #define WM8988_ROUTM2 0x25 #define WM8988_LOUT2V 0x28 #define WM8988_ROUT2V 0x29 #define WM8988_LPPB 0x43 #define WM8988_NUM_REG 0x44 #define WM8988_SYSCLK 0 #endif s='sub'>net-next plumbingsTobias Klauser
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authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /sound/pci/oxygen/wm8785.h
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'sound/pci/oxygen/wm8785.h')