/*
 * mt2701-afe-common.h  --  Mediatek 2701 audio driver definitions
 *
 * Copyright (c) 2016 MediaTek Inc.
 * Author: Garlic Tseng <garlic.tseng@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _MT_2701_AFE_COMMON_H_
#define _MT_2701_AFE_COMMON_H_
#include <sound/soc.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include "mt2701-reg.h"
#include "../common/mtk-base-afe.h"

#define MT2701_STREAM_DIR_NUM (SNDRV_PCM_STREAM_LAST + 1)
#define MT2701_PLL_DOMAIN_0_RATE	98304000
#define MT2701_PLL_DOMAIN_1_RATE	90316800
#define MT2701_AUD_AUD_MUX1_DIV_RATE (MT2701_PLL_DOMAIN_0_RATE / 2)
#define MT2701_AUD_AUD_MUX2_DIV_RATE (MT2701_PLL_DOMAIN_1_RATE / 2)

enum {
	MT2701_I2S_1,
	MT2701_I2S_2,
	MT2701_I2S_3,
	MT2701_I2S_4,
	MT2701_I2S_NUM,
};

enum {
	MT2701_MEMIF_DL1,
	MT2701_MEMIF_DL2,
	MT2701_MEMIF_DL3,
	MT2701_MEMIF_DL4,
	MT2701_MEMIF_DL5,
	MT2701_MEMIF_DL_SINGLE_NUM,
	MT2701_MEMIF_DLM = MT2701_MEMIF_DL_SINGLE_NUM,
	MT2701_MEMIF_UL1,
	MT2701_MEMIF_UL2,
	MT2701_MEMIF_UL3,
	MT2701_MEMIF_UL4,
	MT2701_MEMIF_UL5,
	MT2701_MEMIF_DLBT,
	MT2701_MEMIF_ULBT,
	MT2701_MEMIF_NUM,
	MT2701_IO_I2S = MT2701_MEMIF_NUM,
	MT2701_IO_2ND_I2S,
	MT2701_IO_3RD_I2S,
	MT2701_IO_4TH_I2S,
	MT2701_IO_5TH_I2S,
	MT2701_IO_6TH_I2S,
	MT2701_IO_MRG,
};

enum {
	MT2701_IRQ_ASYS_START,
	MT2701_IRQ_ASYS_IRQ1 = MT2701_IRQ_ASYS_START,
	MT2701_IRQ_ASYS_IRQ2,
	MT2701_IRQ_ASYS_IRQ3,
	MT2701_IRQ_ASYS_END,
};

/* 2701 clock def */
enum audio_system_clock_type {
	MT2701_AUD_INFRA_SYS_AUDIO,
	MT2701_AUD_AUD_MUX1_SEL,
	MT2701_AUD_AUD_MUX2_SEL,
	MT2701_AUD_AUD_MUX1_DIV,
	MT2701_AUD_AUD_MUX2_DIV,
	MT2701_AUD_AUD_48K_TIMING,
	MT2701_AUD_AUD_44K_TIMING,
	MT2701_AUD_AUDPLL_MUX_SEL,
	MT2701_AUD_APLL_SEL,
	MT2701_AUD_AUD1PLL_98M,
	MT2701_AUD_AUD2PLL_90M,
	MT2701_AUD_HADDS2PLL_98M,
	MT2701_AUD_HADDS2PLL_294M,
	MT2701_AUD_AUDPLL,
	MT2701_AUD_AUDPLL_D4,
	MT2701_AUD_AUDPLL_D8,
	MT2701_AUD_AUDPLL_D16,
	MT2701_AUD_AUDPLL_D24,
	MT2701_AUD_AUDINTBUS,
	MT2701_AUD_CLK_26M,
	MT2701_AUD_SYSPLL1_D4,
	MT2701_AUD_AUD_K1_SRC_SEL,
	MT2701_AUD_AUD_K2_SRC_SEL,
	MT2701_AUD_AUD_K3_SRC_SEL,
	MT2701_AUD_AUD_K4_SRC_SEL,
	MT2701_AUD_AUD_K5_SRC_SEL,
	MT2701_AUD_AUD_K6_SRC_SEL,
	MT2701_AUD_AUD_K1_SRC_DIV,
	MT2701_AUD_AUD_K2_SRC_DIV,
	MT2701_AUD_AUD_K3_SRC_DIV,
	MT2701_AUD_AUD_K4_SRC_DIV,
	MT2701_AUD_AUD_K5_SRC_DIV,
	MT2701_AUD_AUD_K6_SRC_DIV,
	MT2701_AUD_AUD_I2S1_MCLK,
	MT2701_AUD_AUD_I2S2_MCLK,
	MT2701_AUD_AUD_I2S3_MCLK,
	MT2701_AUD_AUD_I2S4_MCLK,
	MT2701_AUD_AUD_I2S5_MCLK,
	MT2701_AUD_AUD_I2S6_MCLK,
	MT2701_AUD_ASM_M_SEL,
	MT2701_AUD_ASM_H_SEL,
	MT2701_AUD_UNIVPLL2_D4,
	MT2701_AUD_UNIVPLL2_D2,
	MT2701_AUD_SYSPLL_D5,
	MT2701_CLOCK_NUM
};

static const unsigned int mt2701_afe_backup_list[] = {
	AUDIO_TOP_CON0,
	AUDIO_TOP_CON4,
	AUDIO_TOP_CON5,
	ASYS_TOP_CON,
	AFE_CONN0,
	AFE_CONN1,
	AFE_CONN2,
	AFE_CONN3,
	AFE_CONN15,
	AFE_CONN16,
	AFE_CONN17,
	AFE_CONN18,
	AFE_CONN19,
	AFE_CONN20,
	AFE_CONN21,
	AFE_CONN22,
	AFE_DAC_CON0,
	AFE_MEMIF_PBUF_SIZE,
};

struct snd_pcm_substream;
struct mtk_base_irq_data;

struct mt2701_i2s_data {
	int i2s_ctrl_reg;
	int i2s_pwn_shift;
	int i2s_asrc_fs_shift;
	int i2s_asrc_fs_mask;
};

enum mt2701_i2s_dir {
	I2S_OUT,
	I2S_IN,
	I2S_DIR_NUM,
};

struct mt2701_i2s_path {
	int dai_id;
	int mclk_rate;
	int on[I2S_DIR_NUM];
	int occupied[I2S_DIR_NUM];
	const struct mt2701_i2s_data *i2s_data[2];
};

struct mt2701_afe_private {
	struct clk *clocks[MT2701_CLOCK_NUM];
	struct mt2701_i2s_path i2s_path[MT2701_I2S_NUM];
	bool mrg_enable[MT2701_STREAM_DIR_NUM];
};

#endif
tion value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><table summary='commit info' class='commit-info'>
<tr><th>author</th><td>Laura Abbott &lt;labbott@redhat.com&gt;</td><td class='right'>2016-12-21 12:32:54 -0800</td></tr>
<tr><th>committer</th><td>Herbert Xu &lt;herbert@gondor.apana.org.au&gt;</td><td class='right'>2016-12-27 17:32:11 +0800</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/uapi/video?h=nds-private-remove&amp;id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286'>02608e02fbec04fccf2eb0cc8d8082f65c0a4286</a> (<a href='/cgit.cgi/linux/net-next.git/patch/include/uapi/video?id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?h=nds-private-remove&amp;id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286'>37ff0410d130cfe77185f591b07cd6403f207f0c</a> /<a href='/cgit.cgi/linux/net-next.git/tree/include/uapi/video?h=nds-private-remove&amp;id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286'>include/uapi/video</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/uapi/video?h=nds-private-remove&amp;id=7ce7d89f48834cefece7804d38fc5d85382edf77'>7ce7d89f48834cefece7804d38fc5d85382edf77</a> (<a href='/cgit.cgi/linux/net-next.git/diff/include/uapi/video?h=nds-private-remove&amp;id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286&amp;id2=7ce7d89f48834cefece7804d38fc5d85382edf77'>diff</a>)</td></tr></table>
<div class='commit-subject'>crypto: testmgr - Use heap buffer for acomp test input</div><div class='commit-msg'>Christopher Covington reported a crash on aarch64 on recent Fedora
kernels:

kernel BUG at ./include/linux/scatterlist.h:140!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
Modules linked in:
CPU: 2 PID: 752 Comm: cryptomgr_test Not tainted 4.9.0-11815-ge93b1cc #162
Hardware name: linux,dummy-virt (DT)
task: ffff80007c650080 task.stack: ffff800008910000
PC is at sg_init_one+0xa0/0xb8
LR is at sg_init_one+0x24/0xb8
...
[&lt;ffff000008398db8&gt;] sg_init_one+0xa0/0xb8
[&lt;ffff000008350a44&gt;] test_acomp+0x10c/0x438
[&lt;ffff000008350e20&gt;] alg_test_comp+0xb0/0x118
[&lt;ffff00000834f28c&gt;] alg_test+0x17c/0x2f0
[&lt;ffff00000834c6a4&gt;] cryptomgr_test+0x44/0x50
[&lt;ffff0000080dac70&gt;] kthread+0xf8/0x128
[&lt;ffff000008082ec0&gt;] ret_from_fork+0x10/0x50

The test vectors used for input are part of the kernel image. These
inputs are passed as a buffer to sg_init_one which eventually blows up
with BUG_ON(!virt_addr_valid(buf)). On arm64, virt_addr_valid returns
false for the kernel image since virt_to_page will not return the
correct page. Fix this by copying the input vectors to heap buffer
before setting up the scatterlist.

Reported-by: Christopher Covington &lt;cov@codeaurora.org&gt;
Fixes: d7db7a882deb ("crypto: acomp - update testmgr with support for acomp")
Signed-off-by: Laura Abbott &lt;labbott@redhat.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?h=nds-private-remove&amp;id=02608e02fbec04fccf2eb0cc8d8082f65c0a4286'>Diffstat</a> (limited to 'include/uapi/video')</div><table summary='diffstat' class='diffstat'>