/* * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * lpass-ipq806x.c -- ALSA SoC CPU DAI driver for QTi LPASS * Splited out the IPQ8064 soc specific from lpass-cpu.c */ #include #include #include #include #include #include #include #include #include #include #include "lpass-lpaif-reg.h" #include "lpass.h" enum lpaif_i2s_ports { IPQ806X_LPAIF_I2S_PORT_CODEC_SPK, IPQ806X_LPAIF_I2S_PORT_CODEC_MIC, IPQ806X_LPAIF_I2S_PORT_SEC_SPK, IPQ806X_LPAIF_I2S_PORT_SEC_MIC, IPQ806X_LPAIF_I2S_PORT_MI2S, }; enum lpaif_dma_channels { IPQ806X_LPAIF_RDMA_CHAN_MI2S, IPQ806X_LPAIF_RDMA_CHAN_PCM0, IPQ806X_LPAIF_RDMA_CHAN_PCM1, }; static struct snd_soc_dai_driver ipq806x_lpass_cpu_dai_driver = { .id = IPQ806X_LPAIF_I2S_PORT_MI2S, .playback = { .stream_name = "lpass-cpu-playback", .formats = SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S24 | SNDRV_PCM_FMTBIT_S32, .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000, .rate_min = 8000, .rate_max = 96000, .channels_min = 1, .channels_max = 8, }, .probe = &asoc_qcom_lpass_cpu_dai_probe, .ops = &asoc_qcom_lpass_cpu_dai_ops, }; static int ipq806x_lpass_alloc_dma_channel(struct lpass_data *drvdata, int dir) { if (dir == SNDRV_PCM_STREAM_PLAYBACK) return IPQ806X_LPAIF_RDMA_CHAN_MI2S; else /* Capture currently not implemented */ return -EINVAL; } static int ipq806x_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) { return 0; } static struct lpass_variant ipq806x_data = { .i2sctrl_reg_base = 0x0010, .i2sctrl_reg_stride = 0x04, .i2s_ports = 5, .irq_reg_base = 0x3000, .irq_reg_stride = 0x1000, .irq_ports = 3, .rdma_reg_base = 0x6000, .rdma_reg_stride = 0x1000, .rdma_channels = 4, .wrdma_reg_base = 0xB000, .wrdma_reg_stride = 0x1000, .wrdma_channel_start = 5, .wrdma_channels = 4, .dai_driver = &ipq806x_lpass_cpu_dai_driver, .num_dai = 1, .alloc_dma_channel = ipq806x_lpass_alloc_dma_channel, .free_dma_channel = ipq806x_lpass_free_dma_channel, }; static const struct of_device_id ipq806x_lpass_cpu_device_id[] = { { .compatible = "qcom,lpass-cpu", .data = &ipq806x_data }, {} }; MODULE_DEVICE_TABLE(of, ipq806x_lpass_cpu_device_id); static struct platform_driver ipq806x_lpass_cpu_platform_driver = { .driver = { .name = "lpass-cpu", .of_match_table = of_match_ptr(ipq806x_lpass_cpu_device_id), }, .probe = asoc_qcom_lpass_cpu_platform_probe, .remove = asoc_qcom_lpass_cpu_platform_remove, }; module_platform_driver(ipq806x_lpass_cpu_platform_driver); MODULE_DESCRIPTION("QTi LPASS CPU Driver"); MODULE_LICENSE("GPL v2"); ve&id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>ia64
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /tools/arch/ia64
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/arch/ia64')